INTRINS_OVR(SSE_USUB_SATI16, usub_sat, Generic, v128_i2_t)
#endif
#if defined(TARGET_WASM)
+INTRINS_OVR(WASM_ALLTRUE_V16, wasm_alltrue, Wasm, sse_i1_t)
+INTRINS_OVR(WASM_ALLTRUE_V8, wasm_alltrue, Wasm, sse_i2_t)
+INTRINS_OVR(WASM_ALLTRUE_V4, wasm_alltrue, Wasm, sse_i4_t)
+INTRINS_OVR(WASM_ALLTRUE_V2, wasm_alltrue, Wasm, sse_i8_t)
INTRINS_OVR(WASM_ANYTRUE_V16, wasm_anytrue, Wasm, sse_i1_t)
INTRINS_OVR(WASM_ANYTRUE_V8, wasm_anytrue, Wasm, sse_i2_t)
INTRINS_OVR(WASM_ANYTRUE_V4, wasm_anytrue, Wasm, sse_i4_t)
int nelems;
#if defined(TARGET_WASM)
+ IntrinsicId intrins = (IntrinsicId)0;
+ nelems = LLVMGetVectorSize (LLVMTypeOf (lhs));
/* The wasm code generator doesn't understand the shuffle/and code sequence below */
- LLVMValueRef val;
if (LLVMIsNull (lhs) || LLVMIsNull (rhs)) {
- val = LLVMIsNull (lhs) ? rhs : lhs;
- nelems = LLVMGetVectorSize (LLVMTypeOf (lhs));
-
- IntrinsicId intrins = (IntrinsicId)0;
switch (nelems) {
case 16:
intrins = INTRINS_WASM_ANYTRUE_V16;
default:
g_assert_not_reached ();
}
+ LLVMValueRef val = LLVMIsNull (lhs) ? rhs : lhs;
+
/* res = !wasm.anytrue (val) */
values [ins->dreg] = call_intrins (ctx, intrins, &val, "");
values [ins->dreg] = LLVMBuildZExt (builder, LLVMBuildICmp (builder, LLVMIntEQ, values [ins->dreg], const_int32 (0), ""), LLVMInt32Type (), dname);
t = LLVMVectorType (elemt, nelems);
cmp = LLVMBuildSExt (builder, cmp, t, "");
+#if defined(TARGET_WASM)
+ switch (nelems) {
+ case 16:
+ intrins = INTRINS_WASM_ALLTRUE_V16;
+ break;
+ case 8:
+ intrins = INTRINS_WASM_ALLTRUE_V8;
+ break;
+ case 4:
+ intrins = INTRINS_WASM_ALLTRUE_V4;
+ break;
+ case 2:
+ intrins = INTRINS_WASM_ALLTRUE_V2;
+ break;
+ default:
+ g_assert_not_reached ();
+ }
+ values [ins->dreg] = call_intrins (ctx, intrins, &cmp, "");
+ break;
+#endif
// cmp is a <nelems x elemt> vector, each element is either 0xff... or 0
int half = nelems / 2;
while (half >= 1) {