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ARM: dts: stm32: update rtc st,syscfg property on stm32h743
author
Amelie Delaunay
<amelie.delaunay@st.com>
Wed, 22 Aug 2018 09:45:00 +0000
(11:45 +0200)
committer
Alexandre Torgue
<alexandre.torgue@st.com>
Thu, 20 Sep 2018 07:48:47 +0000
(09:48 +0200)
To fit with latest rtc driver updates, rtc st,syscfg property must contain
the control register offset of pwrcfg and the mask corresponding to the
DBP (Disable Backup Protection) bit.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
arch/arm/boot/dts/stm32h743.dtsi
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diff --git
a/arch/arm/boot/dts/stm32h743.dtsi
b/arch/arm/boot/dts/stm32h743.dtsi
index
637beff
..
cbdd69c
100644
(file)
--- a/
arch/arm/boot/dts/stm32h743.dtsi
+++ b/
arch/arm/boot/dts/stm32h743.dtsi
@@
-472,7
+472,7
@@
interrupt-parent = <&exti>;
interrupts = <17 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "alarm";
- st,syscfg = <&pwrcfg>;
+ st,syscfg = <&pwrcfg
0x00 0x100
>;
status = "disabled";
};