sim: cris: update testsuite output after strsignal change

diff --git a/sim/testsuite/sim/cris/ChangeLog b/sim/testsuite/sim/cris/ChangeLog
index eb8efc9..f206a40 100644 (file)
--- a/sim/testsuite/sim/cris/ChangeLog
+++ b/sim/testsuite/sim/cris/ChangeLog
@@ -1,3 +1,16 @@
+2012-03-21  Mike Frysinger  <vapier@gentoo.org>
+
+       * asm/addqpc.ms: Update output to ignore decoded signal string.
+       * asm/boundmv32.ms, asm/fidxd.ms, asm/fidxi.ms, asm/ftagd.ms,
+       asm/ftagi.ms, asm/halt.ms, asm/io6.ms, asm/io7.ms, asm/io8.ms,
+       asm/io9.ms, asm/movecpc.ms, asm/movempc.ms, asm/movepcb.ms,
+       asm/movepcd.ms, asm/movepcw.ms, asm/moveqpc.ms, asm/moverbpc.ms,
+       asm/moverdpc.ms, asm/moverpcb.ms, asm/moverpcw.ms, asm/moverwpc.ms,
+       asm/movppc.ms, asm/movrss.ms, asm/movscpc.ms, asm/movsmpc.ms,
+       asm/movsrpc.ms, asm/movssr.ms, asm/movucpc.ms, asm/movumpc.ms,
+       asm/movurpc.ms, asm/msteppc1.ms, asm/msteppc2.ms, asm/msteppc3.ms,
+       asm/rfg.ms, asm/sbfs.ms, asm/subqpc.ms: Likewise.
+
 2010-10-07  Hans-Peter Nilsson  <hp@axis.com>
 
        * c/seek3.c, c/seek4.c: New tests.

diff --git a/sim/testsuite/sim/cris/asm/addqpc.ms b/sim/testsuite/sim/cris/asm/addqpc.ms
index 13e293e..ba5a1ec 100644 (file)
--- a/sim/testsuite/sim/cris/asm/addqpc.ms
+++ b/sim/testsuite/sim/cris/asm/addqpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/boundmv32.ms b/sim/testsuite/sim/cris/asm/boundmv32.ms
index 4aad1ef..560276e 100644 (file)
--- a/sim/testsuite/sim/cris/asm/boundmv32.ms
+++ b/sim/testsuite/sim/cris/asm/boundmv32.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: program stopped with signal 4.\n
+# output: program stopped with signal 4 (*).\n
  .include "testutils.inc"
 
 ; Check that bound with a memory operand is invalid.

diff --git a/sim/testsuite/sim/cris/asm/fidxd.ms b/sim/testsuite/sim/cris/asm/fidxd.ms
index 447e397..8158682 100644 (file)
--- a/sim/testsuite/sim/cris/asm/fidxd.ms
+++ b/sim/testsuite/sim/cris/asm/fidxd.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: FIDXD isn't implemented\nprogram stopped with signal 5.\n
+# output: FIDXD isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/fidxi.ms b/sim/testsuite/sim/cris/asm/fidxi.ms
index fdee448..1c41ed4 100644 (file)
--- a/sim/testsuite/sim/cris/asm/fidxi.ms
+++ b/sim/testsuite/sim/cris/asm/fidxi.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: FIDXI isn't implemented\nprogram stopped with signal 5.\n
+# output: FIDXI isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/ftagd.ms b/sim/testsuite/sim/cris/asm/ftagd.ms
index 87c7f13..74d4de3 100644 (file)
--- a/sim/testsuite/sim/cris/asm/ftagd.ms
+++ b/sim/testsuite/sim/cris/asm/ftagd.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: FTAGD isn't implemented\nprogram stopped with signal 5.\n
+# output: FTAGD isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/ftagi.ms b/sim/testsuite/sim/cris/asm/ftagi.ms
index 5068476..187d22d 100644 (file)
--- a/sim/testsuite/sim/cris/asm/ftagi.ms
+++ b/sim/testsuite/sim/cris/asm/ftagi.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: FTAGI isn't implemented\nprogram stopped with signal 5.\n
+# output: FTAGI isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/halt.ms b/sim/testsuite/sim/cris/asm/halt.ms
index 368c367..fb4dcb0 100644 (file)
--- a/sim/testsuite/sim/cris/asm/halt.ms
+++ b/sim/testsuite/sim/cris/asm/halt.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: HALT isn't implemented\nprogram stopped with signal 5.\n
+# output: HALT isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/io6.ms b/sim/testsuite/sim/cris/asm/io6.ms
index 6f3c25d..3af3536 100644 (file)
--- a/sim/testsuite/sim/cris/asm/io6.ms
+++ b/sim/testsuite/sim/cris/asm/io6.ms
@@ -4,7 +4,7 @@
 # xerror:
 # output: b1e\n
 # output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
 
 ; Check that invalid access to the simulator area is recognized.
 ; "FAIL" area.

diff --git a/sim/testsuite/sim/cris/asm/io7.ms b/sim/testsuite/sim/cris/asm/io7.ms
index 8c8b461..84488e9 100644 (file)
--- a/sim/testsuite/sim/cris/asm/io7.ms
+++ b/sim/testsuite/sim/cris/asm/io7.ms
@@ -4,7 +4,7 @@
 # xerror:
 # output: ce11d0c\n
 # output: core: 4 byte write to unmapped address 0x90000004 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
 
 ; Check that invalid access to the simulator area is recognized.
 ; "PASS" area.

diff --git a/sim/testsuite/sim/cris/asm/io8.ms b/sim/testsuite/sim/cris/asm/io8.ms
index 0ba9287..49163fd 100644 (file)
--- a/sim/testsuite/sim/cris/asm/io8.ms
+++ b/sim/testsuite/sim/cris/asm/io8.ms
@@ -3,7 +3,7 @@
 # xerror:
 # output: b1e\n
 # output: core: 4 byte write to unmapped address 0x90000008 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
 
 ; Check invalid access valid with --cris-900000xx.
 ; "FAIL" area.

diff --git a/sim/testsuite/sim/cris/asm/io9.ms b/sim/testsuite/sim/cris/asm/io9.ms
index afcb591..3b929a3 100644 (file)
--- a/sim/testsuite/sim/cris/asm/io9.ms
+++ b/sim/testsuite/sim/cris/asm/io9.ms
@@ -3,7 +3,7 @@
 # xerror:
 # output: ce11d0c\n
 # output: core: 4 byte write to unmapped address 0x90000004 at 0x16\n
-# output: program stopped with signal 11.\n
+# output: program stopped with signal 11 (*).\n
 
 ; Check invalid access valid with --cris-900000xx.
 ; "PASS" area.

diff --git a/sim/testsuite/sim/cris/asm/movecpc.ms b/sim/testsuite/sim/cris/asm/movecpc.ms
index cba1c21..880a0f8 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movecpc.ms
+++ b/sim/testsuite/sim/cris/asm/movecpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register * PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register * PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
 # We deliberately match both "read from" and "write to" above.
 

diff --git a/sim/testsuite/sim/cris/asm/movempc.ms b/sim/testsuite/sim/cris/asm/movempc.ms
index 1fd1416..cbbfcc1 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movempc.ms
+++ b/sim/testsuite/sim/cris/asm/movempc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movepcb.ms b/sim/testsuite/sim/cris/asm/movepcb.ms
index 0dcc396..b06932e 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movepcb.ms
+++ b/sim/testsuite/sim/cris/asm/movepcb.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack

diff --git a/sim/testsuite/sim/cris/asm/movepcd.ms b/sim/testsuite/sim/cris/asm/movepcd.ms
index 240db55..2ed0060 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movepcd.ms
+++ b/sim/testsuite/sim/cris/asm/movepcd.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register * PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register * PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
 # Both source and dest contain PC for "test.d r" (move.d r,r).  Ideally,
 # the output message should say "read" of PC, but we allow PC as source in

diff --git a/sim/testsuite/sim/cris/asm/movepcw.ms b/sim/testsuite/sim/cris/asm/movepcw.ms
index d51b0d9..0f3b6a2 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movepcw.ms
+++ b/sim/testsuite/sim/cris/asm/movepcw.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack

diff --git a/sim/testsuite/sim/cris/asm/moveqpc.ms b/sim/testsuite/sim/cris/asm/moveqpc.ms
index dea5106..d5e856b 100644 (file)
--- a/sim/testsuite/sim/cris/asm/moveqpc.ms
+++ b/sim/testsuite/sim/cris/asm/moveqpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack

diff --git a/sim/testsuite/sim/cris/asm/moverbpc.ms b/sim/testsuite/sim/cris/asm/moverbpc.ms
index 34a1f3c..b5ea388 100644 (file)
--- a/sim/testsuite/sim/cris/asm/moverbpc.ms
+++ b/sim/testsuite/sim/cris/asm/moverbpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack

diff --git a/sim/testsuite/sim/cris/asm/moverdpc.ms b/sim/testsuite/sim/cris/asm/moverdpc.ms
index 34a1f3c..b5ea388 100644 (file)
--- a/sim/testsuite/sim/cris/asm/moverdpc.ms
+++ b/sim/testsuite/sim/cris/asm/moverdpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack

diff --git a/sim/testsuite/sim/cris/asm/moverpcb.ms b/sim/testsuite/sim/cris/asm/moverpcb.ms
index d95d9da..13e04b1 100644 (file)
--- a/sim/testsuite/sim/cris/asm/moverpcb.ms
+++ b/sim/testsuite/sim/cris/asm/moverpcb.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack

diff --git a/sim/testsuite/sim/cris/asm/moverpcw.ms b/sim/testsuite/sim/cris/asm/moverpcw.ms
index 88681fb..9b8f929 100644 (file)
--- a/sim/testsuite/sim/cris/asm/moverpcw.ms
+++ b/sim/testsuite/sim/cris/asm/moverpcw.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack

diff --git a/sim/testsuite/sim/cris/asm/moverwpc.ms b/sim/testsuite/sim/cris/asm/moverwpc.ms
index 34a1f3c..b5ea388 100644 (file)
--- a/sim/testsuite/sim/cris/asm/moverwpc.ms
+++ b/sim/testsuite/sim/cris/asm/moverwpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  startnostack

diff --git a/sim/testsuite/sim/cris/asm/movppc.ms b/sim/testsuite/sim/cris/asm/movppc.ms
index e100e25..ee7e8d1 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movppc.ms
+++ b/sim/testsuite/sim/cris/asm/movppc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movrss.ms b/sim/testsuite/sim/cris/asm/movrss.ms
index 964c161..42305f9 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movrss.ms
+++ b/sim/testsuite/sim/cris/asm/movrss.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: Write to support register is unimplemented\nprogram stopped with signal 5.\n
+# output: Write to support register is unimplemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movscpc.ms b/sim/testsuite/sim/cris/asm/movscpc.ms
index a753e23..9861896 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movscpc.ms
+++ b/sim/testsuite/sim/cris/asm/movscpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movsmpc.ms b/sim/testsuite/sim/cris/asm/movsmpc.ms
index 16d818b..95f40ad 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movsmpc.ms
+++ b/sim/testsuite/sim/cris/asm/movsmpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movsrpc.ms b/sim/testsuite/sim/cris/asm/movsrpc.ms
index fccf31a..6971e37 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movsrpc.ms
+++ b/sim/testsuite/sim/cris/asm/movsrpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movssr.ms b/sim/testsuite/sim/cris/asm/movssr.ms
index 62663c1..79e4fbd 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movssr.ms
+++ b/sim/testsuite/sim/cris/asm/movssr.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: Read of support register is unimplemented\nprogram stopped with signal 5.\n
+# output: Read of support register is unimplemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movucpc.ms b/sim/testsuite/sim/cris/asm/movucpc.ms
index 91fe4de..aec82d1 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movucpc.ms
+++ b/sim/testsuite/sim/cris/asm/movucpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movumpc.ms b/sim/testsuite/sim/cris/asm/movumpc.ms
index eecddf2..9bfc492 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movumpc.ms
+++ b/sim/testsuite/sim/cris/asm/movumpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/movurpc.ms b/sim/testsuite/sim/cris/asm/movurpc.ms
index a90c492..3d75110 100644 (file)
--- a/sim/testsuite/sim/cris/asm/movurpc.ms
+++ b/sim/testsuite/sim/cris/asm/movurpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror: 
-# output: General register write to PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register write to PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/msteppc1.ms b/sim/testsuite/sim/cris/asm/msteppc1.ms
index 5c78e0b..d21ffd7 100644 (file)
--- a/sim/testsuite/sim/cris/asm/msteppc1.ms
+++ b/sim/testsuite/sim/cris/asm/msteppc1.ms
@@ -1,7 +1,7 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
 # output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/msteppc2.ms b/sim/testsuite/sim/cris/asm/msteppc2.ms
index e78be45..69bfbaf 100644 (file)
--- a/sim/testsuite/sim/cris/asm/msteppc2.ms
+++ b/sim/testsuite/sim/cris/asm/msteppc2.ms
@@ -1,7 +1,7 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
 # output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/msteppc3.ms b/sim/testsuite/sim/cris/asm/msteppc3.ms
index 9e6d301..09e87a3 100644 (file)
--- a/sim/testsuite/sim/cris/asm/msteppc3.ms
+++ b/sim/testsuite/sim/cris/asm/msteppc3.ms
@@ -1,7 +1,7 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
 # output: General register read of PC is not implemented.\n
-# output: program stopped with signal 5.\n
+# output: program stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/rfg.ms b/sim/testsuite/sim/cris/asm/rfg.ms
index f5439ed..aa664b2 100644 (file)
--- a/sim/testsuite/sim/cris/asm/rfg.ms
+++ b/sim/testsuite/sim/cris/asm/rfg.ms
@@ -1,6 +1,6 @@
 # mach: crisv32
 # xerror:
-# output: RFG isn't implemented\nprogram stopped with signal 5.\n
+# output: RFG isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/sbfs.ms b/sim/testsuite/sim/cris/asm/sbfs.ms
index 1138e69..5714b52 100644 (file)
--- a/sim/testsuite/sim/cris/asm/sbfs.ms
+++ b/sim/testsuite/sim/cris/asm/sbfs.ms
@@ -1,6 +1,6 @@
 # mach: crisv10
 # xerror:
-# output: SBFS isn't implemented\nprogram stopped with signal 5.\n
+# output: SBFS isn't implemented\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start

diff --git a/sim/testsuite/sim/cris/asm/subqpc.ms b/sim/testsuite/sim/cris/asm/subqpc.ms
index dd4d2bf..e2679a3 100644 (file)
--- a/sim/testsuite/sim/cris/asm/subqpc.ms
+++ b/sim/testsuite/sim/cris/asm/subqpc.ms
@@ -1,6 +1,6 @@
 # mach: crisv3 crisv8 crisv10
 # xerror:
-# output: General register read of PC is not implemented.\nprogram stopped with signal 5.\n
+# output: General register read of PC is not implemented.\nprogram stopped with signal 5 (*).\n
 
  .include "testutils.inc"
  start