iris: Force device local memory for u_upload_mgr buffers
authorKenneth Graunke <kenneth@whitecape.org>
Thu, 1 Jul 2021 21:49:49 +0000 (14:49 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Wed, 7 Jul 2021 20:04:11 +0000 (13:04 -0700)
We try to place persistent/coherent buffers from the application in
system memory, because they want the CPU-GPU coherency.

However, our internal u_upload_mgr buffers are also flagged persistent +
coherent, but we absolutely want most of them in device local memory.

Mark had done this correctly in an earlier patch series, but I made a
mistake when refactoring things during upstreaming, and accidentally
put these in SMEM again.  This fixes that mistake.

Tested-by: Luis Felipe Strano Moraes <luis.strano@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11681>

src/gallium/drivers/iris/iris_context.c
src/gallium/drivers/iris/iris_program_cache.c
src/gallium/drivers/iris/iris_resource.c
src/gallium/drivers/iris/iris_resource.h

index 274d0c0..45d82b9 100644 (file)
@@ -295,7 +295,8 @@ iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
    }
    ctx->const_uploader = u_upload_create(ctx, 1024 * 1024,
                                          PIPE_BIND_CONSTANT_BUFFER,
-                                         PIPE_USAGE_IMMUTABLE, 0);
+                                         PIPE_USAGE_IMMUTABLE,
+                                         IRIS_RESOURCE_FLAG_DEVICE_MEM);
    if (!ctx->const_uploader) {
       u_upload_destroy(ctx->stream_uploader);
       free(ctx);
@@ -330,13 +331,16 @@ iris_create_context(struct pipe_screen *pscreen, void *priv, unsigned flags)
 
    ice->state.surface_uploader =
       u_upload_create(ctx, 64 * 1024, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
-                      IRIS_RESOURCE_FLAG_SURFACE_MEMZONE);
+                      IRIS_RESOURCE_FLAG_SURFACE_MEMZONE |
+                      IRIS_RESOURCE_FLAG_DEVICE_MEM);
    ice->state.bindless_uploader =
       u_upload_create(ctx, 64 * 1024, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
-                      IRIS_RESOURCE_FLAG_BINDLESS_MEMZONE);
+                      IRIS_RESOURCE_FLAG_BINDLESS_MEMZONE |
+                      IRIS_RESOURCE_FLAG_DEVICE_MEM);
    ice->state.dynamic_uploader =
       u_upload_create(ctx, 64 * 1024, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
-                      IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE);
+                      IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE |
+                      IRIS_RESOURCE_FLAG_DEVICE_MEM);
 
    ice->query_buffer_uploader =
       u_upload_create(ctx, 16 * 1024, PIPE_BIND_CUSTOM, PIPE_USAGE_STAGING,
index 36faeef..254cc27 100644 (file)
@@ -272,10 +272,12 @@ iris_init_program_cache(struct iris_context *ice)
 
    ice->shaders.uploader_driver =
       u_upload_create(&ice->ctx, 16384, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
-                      IRIS_RESOURCE_FLAG_SHADER_MEMZONE);
+                      IRIS_RESOURCE_FLAG_SHADER_MEMZONE |
+                      IRIS_RESOURCE_FLAG_DEVICE_MEM);
    ice->shaders.uploader_unsync =
       u_upload_create(&ice->ctx, 16384, PIPE_BIND_CUSTOM, PIPE_USAGE_IMMUTABLE,
-                      IRIS_RESOURCE_FLAG_SHADER_MEMZONE);
+                      IRIS_RESOURCE_FLAG_SHADER_MEMZONE |
+                      IRIS_RESOURCE_FLAG_DEVICE_MEM);
 }
 
 void
index 6e62499..95af0d1 100644 (file)
@@ -409,6 +409,9 @@ static uint32_t
 iris_resource_alloc_flags(const struct iris_screen *screen,
                           const struct pipe_resource *templ)
 {
+   if (templ->flags & IRIS_RESOURCE_FLAG_DEVICE_MEM)
+      return 0;
+
    uint32_t flags = 0;
 
    switch (templ->usage) {
index ff4ce11..763fdb8 100644 (file)
@@ -45,6 +45,7 @@ struct iris_format_info {
 #define IRIS_RESOURCE_FLAG_SURFACE_MEMZONE  (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
 #define IRIS_RESOURCE_FLAG_DYNAMIC_MEMZONE  (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
 #define IRIS_RESOURCE_FLAG_BINDLESS_MEMZONE (PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
+#define IRIS_RESOURCE_FLAG_DEVICE_MEM       (PIPE_RESOURCE_FLAG_DRV_PRIV << 4)
 
 /**
  * Resources represent a GPU buffer object or image (mipmap tree).