drm/amdgpu: add soc15 common ip block support for green_sardine (v3)
authorPrike Liang <Prike.Liang@amd.com>
Wed, 6 Nov 2019 03:17:02 +0000 (11:17 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 4 Nov 2020 13:32:14 +0000 (08:32 -0500)
This patch adds common ip support for green_sardine.

v2: use apu flags, squash in CG/PG enablement
v3: rebase

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15.c

index eff68fb..f57c5f5 100644 (file)
@@ -1242,7 +1242,15 @@ static int soc15_common_early_init(void *handle)
                break;
        case CHIP_RENOIR:
                adev->asic_funcs = &soc15_asic_funcs;
-               adev->apu_flags |= AMD_APU_IS_RENOIR;
+               if (adev->pdev->device == 0x1636)
+                       adev->apu_flags |= AMD_APU_IS_RENOIR;
+               else
+                       adev->apu_flags |= AMD_APU_IS_GREEN_SARDINE;
+
+               if (adev->apu_flags & AMD_APU_IS_RENOIR)
+                       adev->external_rev_id = adev->rev_id + 0x91;
+               else
+                       adev->external_rev_id = adev->rev_id + 0xa1;
                adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
                                 AMD_CG_SUPPORT_GFX_MGLS |
                                 AMD_CG_SUPPORT_GFX_3D_CGCG |
@@ -1267,7 +1275,6 @@ static int soc15_common_early_init(void *handle)
                                 AMD_PG_SUPPORT_VCN |
                                 AMD_PG_SUPPORT_JPEG |
                                 AMD_PG_SUPPORT_VCN_DPG;
-               adev->external_rev_id = adev->rev_id + 0x91;
                break;
        default:
                /* FIXME: not supported yet */