arm: exynos4: support spi pinmux configuration

This patch supports spi pinmux configuration for exynos4 and
exynos3.

Change-Id: If526783f161e2c1863b5bec110940b5aeb2c6c1d
Signed-off-by: Jaeyong Lee <jaeyong2.lee@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index f57af43635189bca3c189a1eab36750b4218d23e..6693675f41f2f4cd2089fb9e6578a348a4d8a312 100644 (file)
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -692,6 +692,35 @@ static int exynos5_pinmux_config(int peripheral, int flags)
        return 0;
 }
 
+static void exynos4_spi_config(int peripheral)
+{
+       struct exynos4_gpio_part1 *gpio1 =
+               (struct exynos4_gpio_part1 *) samsung_get_base_gpio_part1();
+       struct s5p_gpio_bank *bank;
+       int start = 0, count = 0;
+       int i, cfg;
+
+       switch (peripheral) {
+       case PERIPH_ID_SPI0:
+               bank = &gpio1->b;
+               start = 0;
+               count = 4;
+               cfg = GPIO_FUNC(0x2);
+               break;
+       case PERIPH_ID_SPI1:
+               bank = &gpio1->b;
+               start = 4;
+               count = 4;
+               cfg = GPIO_FUNC(0x2);
+               break;
+       default:
+               return;
+       }
+
+       for (i = start; i < start + count; i++)
+               s5p_gpio_cfg_pin(bank, i, cfg);
+}
+
 static void exynos4_input_config(int peripheral)
 {
        struct exynos4_gpio_part2 *gpio2 =
@@ -726,6 +755,10 @@ static int exynos4_pinmux_config(int peripheral, int flags)
        case PERIPH_ID_SDMMC2:
        case PERIPH_ID_SDMMC3:
                return exynos4_mmc_config(peripheral, flags);
+       case PERIPH_ID_SPI0:
+       case PERIPH_ID_SPI1:
+               exynos4_spi_config(peripheral);
+               break;
        case PERIPH_ID_INPUT_X0_0:
                exynos4_input_config(peripheral);
                break;