net/mlx4_en: RX, Add a prefetch command for small L1_CACHE_BYTES
authorTariq Toukan <tariqt@mellanox.com>
Wed, 26 Aug 2020 12:54:18 +0000 (15:54 +0300)
committerDavid S. Miller <davem@davemloft.net>
Wed, 26 Aug 2020 22:55:53 +0000 (15:55 -0700)
A single cacheline might not contain the packet header for
small L1_CACHE_BYTES values.
Use net_prefetch() as it issues an additional prefetch
in this case.

Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Reviewed-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlx4/en_rx.c

index b50c567ef508e71276938049f9dc31dd7cceeac3..99d7737e8ad677df1337064682676cbf15861570 100644 (file)
@@ -705,7 +705,7 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
 
                frags = ring->rx_info + (index << priv->log_rx_info);
                va = page_address(frags[0].page) + frags[0].page_offset;
-               prefetchw(va);
+               net_prefetchw(va);
                /*
                 * make sure we read the CQE after we read the ownership bit
                 */