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* config/tc-mips.c (mips_set_options): Add sym32 field.
authorRichard Sandiford <rdsandiford@googlemail.com>
Fri, 4 Mar 2005 09:51:11 +0000 (09:51 +0000)
committerRichard Sandiford <rdsandiford@googlemail.com>
Fri, 4 Mar 2005 09:51:11 +0000 (09:51 +0000)
(mips_opts): Initialize it.
(HAVE_32BIT_ADDRESSES): Set to true if pointers are 32 bits wide.
(HAVE_64BIT_ADDRESSES): Redefine as !HAVE_32BIT_ADDRESSES.
(HAVE_32BIT_SYMBOLS, HAVE_64BIT_SYMBOLS): New macros.
(load_address): Use HAVE_64BIT_SYMBOLS instead of HAVE_64BIT_ADDRESSES
when deciding whether to use a symbolic %highest/%higher expansion.
(macro): Likewise.  Remove o64/n32 linux hack.  Always use
ADDRESS_ADD*_INSN for address addition in the expansion of "dla"
and "la".  Handle constants separately from symbolic expressions in
the "ld_st:" case, using 64-bit arithmetic if HAVE_64BIT_ADDRESSES
and using load_register to load the high part of the address.
(OPTION_MSYM32, OPTION_NO_MSYM32): New macros.
(OPTION_ELF_BASE): Bump by 2.
(md_longopts): Add entries for -msym32 and -mno-sym32.
(md_parse_option): Handle them.
(usage): Document them.
(s_mipsset): Handle ".set sym32" and ".set nosym32".
(s_cpload, s_cpsetup): Use HAVE_64BIT_SYMBOLS instead of
HAVE_64BIT_ADDRESSES to detect 64-bit values of "_gp".
* doc/c-mips.texi: Document ".set sym32", ".set nosym32",
-msym32 and -mno-sym32.

13 files changed:
gas/ChangeLog patch | blob | history
gas/config/tc-mips.c patch | blob | history
gas/doc/c-mips.texi patch | blob | history
gas/testsuite/ChangeLog patch | blob | history
gas/testsuite/gas/mips/ldstla-eabi64.d [new file with mode: 0644] patch | blob
gas/testsuite/gas/mips/ldstla-n32-shared.d [deleted file] patch | blob | history
gas/testsuite/gas/mips/ldstla-n32.d [deleted file] patch | blob | history
gas/testsuite/gas/mips/ldstla-n32.s [deleted file] patch | blob | history
gas/testsuite/gas/mips/ldstla-n64-shared.d patch | blob | history
gas/testsuite/gas/mips/ldstla-n64-sym32.d [new file with mode: 0644] patch | blob
gas/testsuite/gas/mips/ldstla-n64.d patch | blob | history
gas/testsuite/gas/mips/ldstla-sym32.s [new file with mode: 0644] patch | blob
gas/testsuite/gas/mips/mips.exp patch | blob | history

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 7b71d47..efd2db9 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,28 @@
+2005-03-04  Richard Sandiford  <rsandifo@redhat.com>
+
+       * config/tc-mips.c (mips_set_options): Add sym32 field.
+       (mips_opts): Initialize it.
+       (HAVE_32BIT_ADDRESSES): Set to true if pointers are 32 bits wide.
+       (HAVE_64BIT_ADDRESSES): Redefine as !HAVE_32BIT_ADDRESSES.
+       (HAVE_32BIT_SYMBOLS, HAVE_64BIT_SYMBOLS): New macros.
+       (load_address): Use HAVE_64BIT_SYMBOLS instead of HAVE_64BIT_ADDRESSES
+       when deciding whether to use a symbolic %highest/%higher expansion.
+       (macro): Likewise.  Remove o64/n32 linux hack.  Always use
+       ADDRESS_ADD*_INSN for address addition in the expansion of "dla"
+       and "la".  Handle constants separately from symbolic expressions in
+       the "ld_st:" case, using 64-bit arithmetic if HAVE_64BIT_ADDRESSES
+       and using load_register to load the high part of the address.
+       (OPTION_MSYM32, OPTION_NO_MSYM32): New macros.
+       (OPTION_ELF_BASE): Bump by 2.
+       (md_longopts): Add entries for -msym32 and -mno-sym32.
+       (md_parse_option): Handle them.
+       (usage): Document them.
+       (s_mipsset): Handle ".set sym32" and ".set nosym32".
+       (s_cpload, s_cpsetup): Use HAVE_64BIT_SYMBOLS instead of
+       HAVE_64BIT_ADDRESSES to detect 64-bit values of "_gp".
+       * doc/c-mips.texi: Document ".set sym32", ".set nosym32",
+       -msym32 and -mno-sym32.
+
 2005-03-03  Thiemo Seufer  <seufer@csv.ica.uni-stuttgart.de>
 
        * config/tc-mips.c (load_address): Implement GP optimization
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 9918779..a0ad808 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -189,6 +189,8 @@ struct mips_set_options
   /* MIPS architecture (CPU) type.  Changed by .set arch=FOO, the -march
      command line option, and the default CPU.  */
   int arch;
+  /* True if ".set sym32" is in effect.  */
+  bfd_boolean sym32;
 };
 
 /* True if -mgp32 was passed.  */
@@ -203,7 +205,7 @@ static int file_mips_fp32 = -1;
 
 static struct mips_set_options mips_opts =
 {
-  ISA_UNKNOWN, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0, CPU_UNKNOWN
+  ISA_UNKNOWN, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0, CPU_UNKNOWN, FALSE
 };
 
 /* These variables are filled in with the masks of registers used.
@@ -286,13 +288,16 @@ static int mips_32bitmode = 0;
 /* True if relocations are stored in-place.  */
 #define HAVE_IN_PLACE_ADDENDS (!HAVE_NEWABI)
 
-/* We can only have 64bit addresses if the object file format supports it.  */
-#define HAVE_32BIT_ADDRESSES                           \
-   (HAVE_32BIT_GPRS                                    \
-    || (bfd_arch_bits_per_address (stdoutput) == 32    \
-        || ! HAVE_64BIT_OBJECTS))                      \
+/* The ABI-derived address size.  */
+#define HAVE_64BIT_ADDRESSES \
+  (HAVE_64BIT_GPRS && (mips_abi == EABI_ABI || mips_abi == N64_ABI))
+#define HAVE_32BIT_ADDRESSES (!HAVE_64BIT_ADDRESSES)
 
-#define HAVE_64BIT_ADDRESSES (! HAVE_32BIT_ADDRESSES)
+/* The size of symbolic constants (i.e., expressions of the form
+   "SYMBOL" or "SYMBOL + OFFSET").  */
+#define HAVE_32BIT_SYMBOLS \
+  (HAVE_32BIT_ADDRESSES || !HAVE_64BIT_OBJECTS || mips_opts.sym32)
+#define HAVE_64BIT_SYMBOLS (!HAVE_32BIT_SYMBOLS)
 
 /* Addresses are loaded in different ways, depending on the address size
    in use.  The n32 ABI Documentation also mandates the use of additions
@@ -3864,7 +3869,7 @@ load_address (int reg, expressionS *ep, int *used_at)
 
         For GP relative symbols in 64bit address space we can use
         the same sequence as in 32bit address space.  */
-      if (HAVE_64BIT_ADDRESSES)
+      if (HAVE_64BIT_SYMBOLS)
        {
          if ((valueT) ep->X_add_number <= MAX_GPREL_OFFSET
              && !nopic_need_relax (ep->X_add_symbol, 1))
@@ -4922,8 +4927,7 @@ macro (struct mips_cl_insn *ip)
          && offset_expr.X_add_number >= -0x8000
          && offset_expr.X_add_number < 0x8000)
        {
-         macro_build (&offset_expr,
-                      (dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu",
+         macro_build (&offset_expr, ADDRESS_ADDI_INSN,
                       "t,r,j", treg, sreg, BFD_RELOC_LO16);
          break;
        }
@@ -4946,10 +4950,7 @@ macro (struct mips_cl_insn *ip)
        }
 
       if (offset_expr.X_op == O_constant)
-       load_register (tempreg, &offset_expr,
-                      (mips_pic == NO_PIC
-                       ? (dbl || HAVE_64BIT_ADDRESSES)
-                       : HAVE_64BIT_ADDRESSES));
+       load_register (tempreg, &offset_expr, HAVE_64BIT_ADDRESSES);
       else if (mips_pic == NO_PIC)
        {
          /* If this is a reference to a GP relative symbol, we want
@@ -4979,7 +4980,7 @@ macro (struct mips_cl_insn *ip)
 
             For GP relative symbols in 64bit address space we can use
             the same sequence as in 32bit address space.  */
-         if (HAVE_64BIT_ADDRESSES)
+         if (HAVE_64BIT_SYMBOLS)
            {
              if ((valueT) offset_expr.X_add_number <= MAX_GPREL_OFFSET
                  && !nopic_need_relax (offset_expr.X_add_symbol, 1))
@@ -5504,16 +5505,7 @@ macro (struct mips_cl_insn *ip)
        abort ();
 
       if (breg != 0)
-       {
-         char *s;
-
-         if (mips_pic == NO_PIC)
-           s = (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu";
-         else
-           s = ADDRESS_ADD_INSN;
-
-         macro_build (NULL, s, "d,v,t", treg, tempreg, breg);
-       }
+       macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, tempreg, breg);
       break;
 
     case M_J_A:
@@ -5882,22 +5874,6 @@ macro (struct mips_cl_insn *ip)
       else
        fmt = "t,o(b)";
 
-      /* Sign-extending 32-bit constants makes their handling easier.
-         The HAVE_64BIT_GPRS... part is due to the linux kernel hack
-         described below.  */
-      if ((! HAVE_64BIT_ADDRESSES
-          && (! HAVE_64BIT_GPRS && offset_expr.X_op == O_constant))
-          && (offset_expr.X_op == O_constant)
-         && ! ((offset_expr.X_add_number & ~((bfd_vma) 0x7fffffff))
-               == ~((bfd_vma) 0x7fffffff)))
-       {
-         if (offset_expr.X_add_number & ~((bfd_vma) 0xffffffff))
-           as_bad (_("constant too large"));
-
-         offset_expr.X_add_number = (((offset_expr.X_add_number & 0xffffffff)
-                                      ^ 0x80000000) - 0x80000000);
-       }
-
       if (offset_expr.X_op != O_constant
          && offset_expr.X_op != O_symbol)
        {
@@ -5907,8 +5883,21 @@ macro (struct mips_cl_insn *ip)
 
       /* A constant expression in PIC code can be handled just as it
         is in non PIC code.  */
-      if (mips_pic == NO_PIC
-         || offset_expr.X_op == O_constant)
+      if (offset_expr.X_op == O_constant)
+       {
+         if (HAVE_32BIT_ADDRESSES
+             && !IS_SEXT_32BIT_NUM (offset_expr.X_add_number))
+           as_bad (_("constant too large"));
+
+         expr1.X_add_number = ((offset_expr.X_add_number + 0x8000)
+                               & ~(bfd_vma) 0xffff);
+         load_register (tempreg, &expr1, HAVE_64BIT_ADDRESSES);
+         if (breg != 0)
+           macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t",
+                        tempreg, tempreg, breg);
+         macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_LO16, tempreg);
+       }
+      else if (mips_pic == NO_PIC)
        {
          /* If this is a reference to a GP relative symbol, and there
             is no base register, we want
@@ -5964,42 +5953,10 @@ macro (struct mips_cl_insn *ip)
               <op>     $treg,<sym>($tempreg)   (BFD_RELOC_LO16)
 
             For GP relative symbols in 64bit address space we can use
-            the same sequence as in 32bit address space.
-
-            If we have 64-bit addresses, as an optimization, for
-            addresses which are 32-bit constants (e.g. kseg0/kseg1
-            addresses) we fall back to the 32-bit address generation
-            mechanism since it is more efficient.  Note that due to
-            the signed offset used by memory operations, the 32-bit
-            range is shifted down by 32768 here.  This code should
-            probably attempt to generate 64-bit constants more
-            efficiently in general.
-
-            As an extension for architectures with 64-bit registers,
-            we don't truncate 64-bit addresses given as literal
-            constants down to 32 bits, to support existing practice
-            in the mips64 Linux (the kernel), that compiles source
-            files with -mabi=64, assembling them as o32 or n32 (with
-            -Wa,-32 or -Wa,-n32).  This is not beautiful, but since
-            the whole kernel is loaded into a memory region that is
-            addressable with sign-extended 32-bit addresses, it is
-            wasteful to compute the upper 32 bits of every
-            non-literal address, that takes more space and time.
-            Some day this should probably be implemented as an
-            assembler option, such that the kernel doesn't have to
-            use such ugly hacks, even though it will still have to
-            end up converting the binary to ELF32 for a number of
-            platforms whose boot loaders don't support ELF64
-            binaries.  */
-         if ((HAVE_64BIT_ADDRESSES
-              && ! (offset_expr.X_op == O_constant
-                    && IS_SEXT_32BIT_NUM (offset_expr.X_add_number + 0x8000)))
-             || (HAVE_64BIT_GPRS
-                 && offset_expr.X_op == O_constant
-                 && ! IS_SEXT_32BIT_NUM (offset_expr.X_add_number + 0x8000)))
+            the same sequence as in 32bit address space.  */
+         if (HAVE_64BIT_SYMBOLS)
            {
-             if (offset_expr.X_op == O_symbol
-                 && (valueT) offset_expr.X_add_number <= MAX_GPREL_OFFSET
+             if ((valueT) offset_expr.X_add_number <= MAX_GPREL_OFFSET
                  && !nopic_need_relax (offset_expr.X_add_symbol, 1))
                {
                  relax_start (offset_expr.X_add_symbol);
@@ -6056,10 +6013,6 @@ macro (struct mips_cl_insn *ip)
              break;
            }
 
-         if (offset_expr.X_op == O_constant
-             && ! IS_SEXT_32BIT_NUM (offset_expr.X_add_number + 0x8000))
-           as_bad (_("load/store address overflow (max 32 bits)"));
-
          if (breg == 0)
            {
              if ((valueT) offset_expr.X_add_number <= MAX_GPREL_OFFSET
@@ -10241,10 +10194,14 @@ struct option md_longopts[] =
 #define OPTION_MNO_SHARED (OPTION_MISC_BASE + 13)
   {"mshared", no_argument, NULL, OPTION_MSHARED},
   {"mno-shared", no_argument, NULL, OPTION_MNO_SHARED},
+#define OPTION_MSYM32 (OPTION_MISC_BASE + 14)
+#define OPTION_MNO_SYM32 (OPTION_MISC_BASE + 15)
+  {"msym32", no_argument, NULL, OPTION_MSYM32},
+  {"mno-sym32", no_argument, NULL, OPTION_MNO_SYM32},
 
   /* ELF-specific options.  */
 #ifdef OBJ_ELF
-#define OPTION_ELF_BASE    (OPTION_MISC_BASE + 14)
+#define OPTION_ELF_BASE    (OPTION_MISC_BASE + 16)
 #define OPTION_CALL_SHARED (OPTION_ELF_BASE + 0)
   {"KPIC",        no_argument, NULL, OPTION_CALL_SHARED},
   {"call_shared", no_argument, NULL, OPTION_CALL_SHARED},
@@ -10465,6 +10422,14 @@ md_parse_option (int c, char *arg)
       mips_in_shared = FALSE;
       break;
 
+    case OPTION_MSYM32:
+      mips_opts.sym32 = TRUE;
+      break;
+
+    case OPTION_MNO_SYM32:
+      mips_opts.sym32 = FALSE;
+      break;
+
 #ifdef OBJ_ELF
       /* When generating ELF code, we permit -KPIC and -call_shared to
         select SVR4_PIC, and -non_shared to select no PIC.  This is
@@ -11814,6 +11779,10 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
          free (s);
        }
     }
+  else if (strcmp (name, "sym32") == 0)
+    mips_opts.sym32 = TRUE;
+  else if (strcmp (name, "nosym32") == 0)
+    mips_opts.sym32 = FALSE;
   else
     {
       as_warn (_("Tried to set unrecognized symbol: %s\n"), name);
@@ -11880,7 +11849,7 @@ s_cpload (int ignore ATTRIBUTE_UNUSED)
 
   /* If we need to produce a 64-bit address, we are better off using
      the default instruction sequence.  */
-  in_shared = mips_in_shared || HAVE_64BIT_ADDRESSES;
+  in_shared = mips_in_shared || HAVE_64BIT_SYMBOLS;
 
   ex.X_op = O_symbol;
   ex.X_add_symbol = symbol_find_or_make (in_shared ? "_gp_disp" : "_gp");
@@ -11984,7 +11953,7 @@ s_cpsetup (int ignore ATTRIBUTE_UNUSED)
     macro_build (NULL, "daddu", "d,v,t", mips_cpreturn_register,
                 mips_gp_register, 0);
 
-  if (mips_in_shared || HAVE_64BIT_ADDRESSES)
+  if (mips_in_shared || HAVE_64BIT_SYMBOLS)
     {
       macro_build (&ex_sym, "lui", "t,u", mips_gp_register,
                   -1, BFD_RELOC_GPREL16, BFD_RELOC_MIPS_SUB,
@@ -14136,6 +14105,8 @@ MIPS options:\n\
 -mfix-vr4120           work around certain VR4120 errata\n\
 -mgp32                 use 32-bit GPRs, regardless of the chosen ISA\n\
 -mfp32                 use 32-bit FPRs, regardless of the chosen ISA\n\
+-mno-shared            optimize output for executables\n\
+-msym32                        assume all symbols have 32-bit values\n\
 -O0                    remove unneeded NOPs, do not swap branches\n\
 -O                     remove unneeded NOPs and swap branches\n\
 --[no-]construct-floats [dis]allow floating point values to be constructed\n\
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 6446c92..b62b7eb 100644 (file)
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -26,6 +26,7 @@ Assembly Language Programming'' in the same work.
 * MIPS Object::        ECOFF object code
 * MIPS Stabs::         Directives for debugging information
 * MIPS ISA::           Directives to override the ISA level
+* MIPS symbol sizes::   Directives to override the size of symbols
 * MIPS autoextend::    Directives for extending MIPS 16 bit instructions
 * MIPS insn::          Directive to mark data as an instruction
 * MIPS option stack::  Directives to save and restore options
@@ -197,6 +198,13 @@ identical to @samp{-march=@var{cpu}}.
 Record which ABI the source code uses.  The recognized arguments
 are: @samp{32}, @samp{n32}, @samp{o64}, @samp{64} and @samp{eabi}.
 
+@item -msym32
+@itemx -mno-sym32
+@cindex -msym32
+@cindex -mno-sym32
+Equivalent to adding @code{.set sym32} or @code{.set nosym32} to
+the beginning of the assembler input.  @xref{MIPS symbol sizes}.
+
 @cindex @code{-nocpp} ignored (MIPS)
 @item -nocpp
 This option is ignored.  It is accepted for command-line compatibility with
@@ -297,6 +305,61 @@ not by traditional @sc{mips} debuggers (this enhancement is required to fully
 support C++ debugging).  These directives are primarily used by compilers, not
 assembly language programmers!
 
+@node MIPS symbol sizes
+@section Directives to override the size of symbols
+
+@cindex @code{.set sym32}
+@cindex @code{.set nosym32}
+The n64 ABI allows symbols to have any 64-bit value.  Although this
+provides a great deal of flexibility, it means that some macros have
+much longer expansions than their 32-bit counterparts.  For example,
+the non-PIC expansion of @samp{dla $4,sym} is usually:
+
+@smallexample
+lui     $4,%highest(sym)
+lui     $1,%hi(sym)
+daddiu  $4,$4,%higher(sym)
+daddiu  $1,$1,%lo(sym)
+dsll32  $4,$4,0
+daddu   $4,$4,$1
+@end smallexample
+
+whereas the 32-bit expansion is simply:
+
+@smallexample
+lui     $4,%hi(sym)
+daddiu  $4,$4,%lo(sym)
+@end smallexample
+
+n64 code is sometimes constructed in such a way that all symbolic
+constants are known to have 32-bit values, and in such cases, it's
+preferable to use the 32-bit expansion instead of the 64-bit
+expansion.
+
+You can use the @code{.set sym32} directive to tell the assembler
+that, from this point on, all expressions of the form
+@samp{@var{symbol}} or @samp{@var{symbol} + @var{offset}}
+have 32-bit values.  For example:
+
+@smallexample
+.set sym32
+dla     $4,sym
+lw      $4,sym+16
+sw      $4,sym+0x8000($4)
+@end smallexample
+
+will cause the assembler to treat @samp{sym}, @code{sym+16} and
+@code{sym+0x8000} as 32-bit values.  The handling of non-symbolic
+addresses is not affected.
+
+The directive @code{.set nosym32} ends a @code{.set sym32} block and
+reverts to the normal behavior.  It is also possible to change the
+symbol size using the command-line options @option{-msym32} and
+@option{-mno-sym32}.
+
+These options and directives are always accepted, but at present,
+they have no effect for anything other than n64.
+
 @node MIPS ISA
 @section Directives to override the ISA level
 
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index b78fc47..9cc46d9 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2005-03-04  Richard Sandiford  <rsandifo@redhat.com>
+
+       * gas/mips/ldstla-{n32.s, n32.d, n32-shared.d}: Delete.
+       * gas/mips/ldstla-{n64.d, n64-shared.d}: Adjust expected output
+       for loads and stores from constant addresses.
+       * gas/mips/ldstla-{sym32.s, eabi64.d, n64-sym32.d}: New tests.
+       * gas/mips/mips.exp: Run them.
+
 2005-03-03  Richard Sandiford  <rsandifo@redhat.com>
 
        * gas/mips/mips.exp: Move tls tests to main $elf block.
diff --git a/gas/testsuite/gas/mips/ldstla-eabi64.d b/gas/testsuite/gas/mips/ldstla-eabi64.d
new file mode 100644 (file)
index 0000000..10b4784
--- /dev/null
+++ b/gas/testsuite/gas/mips/ldstla-eabi64.d
@@ -0,0 +1,657 @@
+#objdump: -dr
+#as: -mabi=eabi -mips3 -G8 -EB
+#name: MIPS ld-st-la (EABI64)
+#source: ldstla-sym32.s
+
+.*file format .*
+
+Disassembly .*:
+
+0+00 <.*>:
+#
+# dla constants
+#
+.*     li      a0,0xa800
+.*     dsll32  a0,a0,0x10
+.*     li      a0,0xa800
+.*     dsll32  a0,a0,0x10
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x8000
+.*     lui     a0,0x8000
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x7fff
+.*     ori     a0,a0,0x7ff8
+.*     lui     a0,0x7fff
+.*     ori     a0,a0,0x7ff8
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x7fff
+.*     ori     a0,a0,0xfff8
+.*     lui     a0,0x7fff
+.*     ori     a0,a0,0xfff8
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x1234
+.*     ori     a0,a0,0x5678
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0x9abc
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0xdef0
+.*     lui     a0,0x1234
+.*     ori     a0,a0,0x5678
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0x9abc
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0xdef0
+.*     daddu   a0,a0,v1
+#
+# dla small_comm
+#
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_comm
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_comm
+.*     daddu   a0,a0,v1
+.*     daddiu  a0,gp,3
+.*: R_MIPS_GPREL16     small_comm
+.*     daddiu  a0,gp,3
+.*: R_MIPS_GPREL16     small_comm
+.*     daddu   a0,a0,v1
+#
+# dla big_comm
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_comm
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_comm
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*     d?addiu a0,a0,3
+.*: R_MIPS_LO16        big_comm
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*     d?addiu a0,a0,3
+.*: R_MIPS_LO16        big_comm
+.*     daddu   a0,a0,v1
+#
+# dla small_data
+#
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_data
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_data
+.*     daddu   a0,a0,v1
+.*     daddiu  a0,gp,3
+.*: R_MIPS_GPREL16     small_data
+.*     daddiu  a0,gp,3
+.*: R_MIPS_GPREL16     small_data
+.*     daddu   a0,a0,v1
+#
+# dla big_data
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_data
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_data
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*     d?addiu a0,a0,3
+.*: R_MIPS_LO16        big_data
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*     d?addiu a0,a0,3
+.*: R_MIPS_LO16        big_data
+.*     daddu   a0,a0,v1
+#
+# dla extern
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        extern
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x3
+.*: R_MIPS_HI16        extern
+.*     d?addiu a0,a0,16384
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0x3
+.*: R_MIPS_HI16        extern
+.*     d?addiu a0,a0,16384
+.*: R_MIPS_LO16        extern
+.*     daddu   a0,a0,v1
+.*     lui     a0,0xfffd
+.*: R_MIPS_HI16        extern
+.*     d?addiu a0,a0,-16384
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0xfffd
+.*: R_MIPS_HI16        extern
+.*     d?addiu a0,a0,-16384
+.*: R_MIPS_LO16        extern
+.*     daddu   a0,a0,v1
+#
+# lw constants
+#
+.*     li      a0,0xa800
+.*     dsll32  a0,a0,0x10
+.*     lw      a0,0\(a0\)
+.*     li      a0,0xa800
+.*     dsll32  a0,a0,0x10
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*     lui     a0,0x8000
+.*     lw      a0,0\(a0\)
+.*     lui     a0,0x8000
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*     lui     a0,0x7fff
+.*     lw      a0,32760\(a0\)
+.*     lui     a0,0x7fff
+.*     daddu   a0,a0,v1
+.*     lw      a0,32760\(a0\)
+.*     li      a0,0x8000
+.*     dsll    a0,a0,0x10
+.*     lw      a0,-8\(a0\)
+.*     li      a0,0x8000
+.*     dsll    a0,a0,0x10
+.*     daddu   a0,a0,v1
+.*     lw      a0,-8\(a0\)
+.*     lui     a0,0x1234
+.*     ori     a0,a0,0x5678
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0x9abd
+.*     dsll    a0,a0,0x10
+.*     lw      a0,-8464\(a0\)
+.*     lui     a0,0x1234
+.*     ori     a0,a0,0x5678
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0x9abd
+.*     dsll    a0,a0,0x10
+.*     daddu   a0,a0,v1
+.*     lw      a0,-8464\(a0\)
+#
+# lw small_comm
+#
+.*     lw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_comm
+.*     daddu   a0,v1,gp
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_GPREL16     small_comm
+.*     lw      a0,3\(gp\)
+.*: R_MIPS_GPREL16     small_comm
+.*     daddu   a0,v1,gp
+.*     lw      a0,3\(a0\)
+.*: R_MIPS_GPREL16     small_comm
+#
+# lw big_comm
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_comm
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_comm
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*     lw      a0,3\(a0\)
+.*: R_MIPS_LO16        big_comm
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*     daddu   a0,a0,v1
+.*     lw      a0,3\(a0\)
+.*: R_MIPS_LO16        big_comm
+#
+# lw small_data
+#
+.*     lw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_data
+.*     daddu   a0,v1,gp
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_GPREL16     small_data
+.*     lw      a0,3\(gp\)
+.*: R_MIPS_GPREL16     small_data
+.*     daddu   a0,v1,gp
+.*     lw      a0,3\(a0\)
+.*: R_MIPS_GPREL16     small_data
+#
+# lw big_data
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_data
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_data
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*     lw      a0,3\(a0\)
+.*: R_MIPS_LO16        big_data
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*     daddu   a0,a0,v1
+.*     lw      a0,3\(a0\)
+.*: R_MIPS_LO16        big_data
+#
+# lw extern
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0x3
+.*: R_MIPS_HI16        extern
+.*     lw      a0,16384\(a0\)
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0x3
+.*: R_MIPS_HI16        extern
+.*     daddu   a0,a0,v1
+.*     lw      a0,16384\(a0\)
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0xfffd
+.*: R_MIPS_HI16        extern
+.*     lw      a0,-16384\(a0\)
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0xfffd
+.*: R_MIPS_HI16        extern
+.*     daddu   a0,a0,v1
+.*     lw      a0,-16384\(a0\)
+.*: R_MIPS_LO16        extern
+#
+# sw constants
+#
+.*     li      at,0xa800
+.*     dsll32  at,at,0x10
+.*     sw      a0,0\(at\)
+.*     li      at,0xa800
+.*     dsll32  at,at,0x10
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*     lui     at,0x8000
+.*     sw      a0,0\(at\)
+.*     lui     at,0x8000
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*     lui     at,0x7fff
+.*     sw      a0,32760\(at\)
+.*     lui     at,0x7fff
+.*     daddu   at,at,v1
+.*     sw      a0,32760\(at\)
+.*     li      at,0x8000
+.*     dsll    at,at,0x10
+.*     sw      a0,-8\(at\)
+.*     li      at,0x8000
+.*     dsll    at,at,0x10
+.*     daddu   at,at,v1
+.*     sw      a0,-8\(at\)
+.*     lui     at,0x1234
+.*     ori     at,at,0x5678
+.*     dsll    at,at,0x10
+.*     ori     at,at,0x9abd
+.*     dsll    at,at,0x10
+.*     sw      a0,-8464\(at\)
+.*     lui     at,0x1234
+.*     ori     at,at,0x5678
+.*     dsll    at,at,0x10
+.*     ori     at,at,0x9abd
+.*     dsll    at,at,0x10
+.*     daddu   at,at,v1
+.*     sw      a0,-8464\(at\)
+#
+# sw small_comm
+#
+.*     sw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_comm
+.*     daddu   at,v1,gp
+.*     sw      a0,0\(at\)
+.*: R_MIPS_GPREL16     small_comm
+.*     sw      a0,3\(gp\)
+.*: R_MIPS_GPREL16     small_comm
+.*     daddu   at,v1,gp
+.*     sw      a0,3\(at\)
+.*: R_MIPS_GPREL16     small_comm
+#
+# sw big_comm
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_comm
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_comm
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*     sw      a0,3\(at\)
+.*: R_MIPS_LO16        big_comm
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*     daddu   at,at,v1
+.*     sw      a0,3\(at\)
+.*: R_MIPS_LO16        big_comm
+#
+# sw small_data
+#
+.*     sw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_data
+.*     daddu   at,v1,gp
+.*     sw      a0,0\(at\)
+.*: R_MIPS_GPREL16     small_data
+.*     sw      a0,3\(gp\)
+.*: R_MIPS_GPREL16     small_data
+.*     daddu   at,v1,gp
+.*     sw      a0,3\(at\)
+.*: R_MIPS_GPREL16     small_data
+#
+# sw big_data
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_data
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_data
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*     sw      a0,3\(at\)
+.*: R_MIPS_LO16        big_data
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*     daddu   at,at,v1
+.*     sw      a0,3\(at\)
+.*: R_MIPS_LO16        big_data
+#
+# sw extern
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0x3
+.*: R_MIPS_HI16        extern
+.*     sw      a0,16384\(at\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0x3
+.*: R_MIPS_HI16        extern
+.*     daddu   at,at,v1
+.*     sw      a0,16384\(at\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0xfffd
+.*: R_MIPS_HI16        extern
+.*     sw      a0,-16384\(at\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0xfffd
+.*: R_MIPS_HI16        extern
+.*     daddu   at,at,v1
+.*     sw      a0,-16384\(at\)
+.*: R_MIPS_LO16        extern
+#
+# usw constants
+#
+.*     li      at,0xa800
+.*     dsll32  at,at,0x10
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     li      at,0xa800
+.*     dsll32  at,at,0x10
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x8000
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x8000
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x7fff
+.*     ori     at,at,0x7ff8
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x7fff
+.*     ori     at,at,0x7ff8
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x7fff
+.*     ori     at,at,0xfff8
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x7fff
+.*     ori     at,at,0xfff8
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x1234
+.*     ori     at,at,0x5678
+.*     dsll    at,at,0x10
+.*     ori     at,at,0x9abc
+.*     dsll    at,at,0x10
+.*     ori     at,at,0xdef0
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x1234
+.*     ori     at,at,0x5678
+.*     dsll    at,at,0x10
+.*     ori     at,at,0x9abc
+.*     dsll    at,at,0x10
+.*     ori     at,at,0xdef0
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw small_comm
+#
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_comm
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_comm
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,3
+.*: R_MIPS_GPREL16     small_comm
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,3
+.*: R_MIPS_GPREL16     small_comm
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw big_comm
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_comm
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_comm
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*     d?addiu at,at,3
+.*: R_MIPS_LO16        big_comm
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*     d?addiu at,at,3
+.*: R_MIPS_LO16        big_comm
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw small_data
+#
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_data
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_data
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,3
+.*: R_MIPS_GPREL16     small_data
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,3
+.*: R_MIPS_GPREL16     small_data
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw big_data
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_data
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_data
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*     d?addiu at,at,3
+.*: R_MIPS_LO16        big_data
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*     d?addiu at,at,3
+.*: R_MIPS_LO16        big_data
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw extern
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        extern
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        extern
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x3
+.*: R_MIPS_HI16        extern
+.*     d?addiu at,at,16384
+.*: R_MIPS_LO16        extern
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x3
+.*: R_MIPS_HI16        extern
+.*     d?addiu at,at,16384
+.*: R_MIPS_LO16        extern
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0xfffd
+.*: R_MIPS_HI16        extern
+.*     d?addiu at,at,-16384
+.*: R_MIPS_LO16        extern
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0xfffd
+.*: R_MIPS_HI16        extern
+.*     d?addiu at,at,-16384
+.*: R_MIPS_LO16        extern
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# with sym32 off (has no effect for EABI64)
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*     daddiu  a0,a0,0
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*     daddiu  at,at,0
+.*: R_MIPS_LO16        extern
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# ...and back on again
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*     daddiu  a0,a0,0
+.*: R_MIPS_LO16        extern
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*     daddiu  at,at,0
+.*: R_MIPS_LO16        extern
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#pass
diff --git a/gas/testsuite/gas/mips/ldstla-n32-shared.d b/gas/testsuite/gas/mips/ldstla-n32-shared.d
deleted file mode 100644 (file)
index 0d4655b..0000000
--- a/gas/testsuite/gas/mips/ldstla-n32-shared.d
+++ /dev/null
@@ -1,154 +0,0 @@
-#objdump: -d
-#as: -KPIC -n32
-#name: MIPS ld-st-la constants (ABI n32, shared)
-#source: ldstla-n32.s
-
-.*: +file format elf32-n.*mips
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:  3c020123        lui     v0,0x123
-   4:  3c0189ac        lui     at,0x89ac
-   8:  64424568        daddiu  v0,v0,17768
-   c:  0023082d        daddu   at,at,v1
-  10:  0002103c        dsll32  v0,v0,0x0
-  14:  0041102d        daddu   v0,v0,at
-  18:  dc42cdef        ld      v0,-12817\(v0\)
-  1c:  3c02abce        lui     v0,0xabce
-  20:  3c012345        lui     at,0x2345
-  24:  6442ef01        daddiu  v0,v0,-4351
-  28:  0023082d        daddu   at,at,v1
-  2c:  0002103c        dsll32  v0,v0,0x0
-  30:  0041102d        daddu   v0,v0,at
-  34:  dc426789        ld      v0,26505\(v0\)
-  38:  3c028000        lui     v0,0x8000
-  3c:  00431021        addu    v0,v0,v1
-  40:  dc420000        ld      v0,0\(v0\)
-  44:  3c020000        lui     v0,0x0
-  48:  3c010000        lui     at,0x0
-  4c:  6442ffff        daddiu  v0,v0,-1
-  50:  0023082d        daddu   at,at,v1
-  54:  0002103c        dsll32  v0,v0,0x0
-  58:  0041102d        daddu   v0,v0,at
-  5c:  dc420000        ld      v0,0\(v0\)
-  60:  3c020000        lui     v0,0x0
-  64:  3c01abce        lui     at,0xabce
-  68:  64420001        daddiu  v0,v0,1
-  6c:  0023082d        daddu   at,at,v1
-  70:  0002103c        dsll32  v0,v0,0x0
-  74:  0041102d        daddu   v0,v0,at
-  78:  dc42ef01        ld      v0,-4351\(v0\)
-  7c:  3c020123        lui     v0,0x123
-  80:  00431021        addu    v0,v0,v1
-  84:  dc424567        ld      v0,17767\(v0\)
-  88:  3c010123        lui     at,0x123
-  8c:  64214568        daddiu  at,at,17768
-  90:  00010c38        dsll    at,at,0x10
-  94:  642189ac        daddiu  at,at,-30292
-  98:  00010c38        dsll    at,at,0x10
-  9c:  0023082d        daddu   at,at,v1
-  a0:  fc22cdef        sd      v0,-12817\(at\)
-  a4:  3c01abce        lui     at,0xabce
-  a8:  6421ef01        daddiu  at,at,-4351
-  ac:  00010c38        dsll    at,at,0x10
-  b0:  64212345        daddiu  at,at,9029
-  b4:  00010c38        dsll    at,at,0x10
-  b8:  0023082d        daddu   at,at,v1
-  bc:  fc226789        sd      v0,26505\(at\)
-  c0:  3c018000        lui     at,0x8000
-  c4:  00230821        addu    at,at,v1
-  c8:  fc220000        sd      v0,0\(at\)
-  cc:  3c010000        lui     at,0x0
-  d0:  6421ffff        daddiu  at,at,-1
-  d4:  00010c38        dsll    at,at,0x10
-  d8:  64210000        daddiu  at,at,0
-  dc:  00010c38        dsll    at,at,0x10
-  e0:  0023082d        daddu   at,at,v1
-  e4:  fc220000        sd      v0,0\(at\)
-  e8:  3c010000        lui     at,0x0
-  ec:  64210001        daddiu  at,at,1
-  f0:  00010c38        dsll    at,at,0x10
-  f4:  6421abce        daddiu  at,at,-21554
-  f8:  00010c38        dsll    at,at,0x10
-  fc:  0023082d        daddu   at,at,v1
- 100:  fc22ef01        sd      v0,-4351\(at\)
- 104:  3c010123        lui     at,0x123
- 108:  00230821        addu    at,at,v1
- 10c:  fc224567        sd      v0,17767\(at\)
- 110:  3c020123        lui     v0,0x123
- 114:  3c0189ac        lui     at,0x89ac
- 118:  64424568        daddiu  v0,v0,17768
- 11c:  0023082d        daddu   at,at,v1
- 120:  0002103c        dsll32  v0,v0,0x0
- 124:  0041102d        daddu   v0,v0,at
- 128:  8c42cdef        lw      v0,-12817\(v0\)
- 12c:  3c02abce        lui     v0,0xabce
- 130:  3c012345        lui     at,0x2345
- 134:  6442ef01        daddiu  v0,v0,-4351
- 138:  0023082d        daddu   at,at,v1
- 13c:  0002103c        dsll32  v0,v0,0x0
- 140:  0041102d        daddu   v0,v0,at
- 144:  8c426789        lw      v0,26505\(v0\)
- 148:  3c028000        lui     v0,0x8000
- 14c:  00431021        addu    v0,v0,v1
- 150:  8c420000        lw      v0,0\(v0\)
- 154:  3c020000        lui     v0,0x0
- 158:  3c010000        lui     at,0x0
- 15c:  6442ffff        daddiu  v0,v0,-1
- 160:  0023082d        daddu   at,at,v1
- 164:  0002103c        dsll32  v0,v0,0x0
- 168:  0041102d        daddu   v0,v0,at
- 16c:  8c420000        lw      v0,0\(v0\)
- 170:  3c020000        lui     v0,0x0
- 174:  3c01abce        lui     at,0xabce
- 178:  64420001        daddiu  v0,v0,1
- 17c:  0023082d        daddu   at,at,v1
- 180:  0002103c        dsll32  v0,v0,0x0
- 184:  0041102d        daddu   v0,v0,at
- 188:  8c42ef01        lw      v0,-4351\(v0\)
- 18c:  3c020123        lui     v0,0x123
- 190:  00431021        addu    v0,v0,v1
- 194:  8c424567        lw      v0,17767\(v0\)
- 198:  3c010123        lui     at,0x123
- 19c:  64214568        daddiu  at,at,17768
- 1a0:  00010c38        dsll    at,at,0x10
- 1a4:  642189ac        daddiu  at,at,-30292
- 1a8:  00010c38        dsll    at,at,0x10
- 1ac:  0023082d        daddu   at,at,v1
- 1b0:  ac22cdef        sw      v0,-12817\(at\)
- 1b4:  3c01abce        lui     at,0xabce
- 1b8:  6421ef01        daddiu  at,at,-4351
- 1bc:  00010c38        dsll    at,at,0x10
- 1c0:  64212345        daddiu  at,at,9029
- 1c4:  00010c38        dsll    at,at,0x10
- 1c8:  0023082d        daddu   at,at,v1
- 1cc:  ac226789        sw      v0,26505\(at\)
- 1d0:  3c018000        lui     at,0x8000
- 1d4:  00230821        addu    at,at,v1
- 1d8:  ac220000        sw      v0,0\(at\)
- 1dc:  3c010000        lui     at,0x0
- 1e0:  6421ffff        daddiu  at,at,-1
- 1e4:  00010c38        dsll    at,at,0x10
- 1e8:  64210000        daddiu  at,at,0
- 1ec:  00010c38        dsll    at,at,0x10
- 1f0:  0023082d        daddu   at,at,v1
- 1f4:  ac220000        sw      v0,0\(at\)
- 1f8:  3c010000        lui     at,0x0
- 1fc:  64210001        daddiu  at,at,1
- 200:  00010c38        dsll    at,at,0x10
- 204:  6421abce        daddiu  at,at,-21554
- 208:  00010c38        dsll    at,at,0x10
- 20c:  0023082d        daddu   at,at,v1
- 210:  ac22ef01        sw      v0,-4351\(at\)
- 214:  3c010123        lui     at,0x123
- 218:  00230821        addu    at,at,v1
- 21c:  ac224567        sw      v0,17767\(at\)
- 220:  3c028000        lui     v0,0x8000
- 224:  3c020123        lui     v0,0x123
- 228:  34424567        ori     v0,v0,0x4567
- 22c:  3c027fff        lui     v0,0x7fff
- 230:  3442ffff        ori     v0,v0,0xffff
- 234:  3c020123        lui     v0,0x123
- 238:  34424567        ori     v0,v0,0x4567
-       \.\.\.
diff --git a/gas/testsuite/gas/mips/ldstla-n32.d b/gas/testsuite/gas/mips/ldstla-n32.d
deleted file mode 100644 (file)
index 9245da4..0000000
--- a/gas/testsuite/gas/mips/ldstla-n32.d
+++ /dev/null
@@ -1,154 +0,0 @@
-#objdump: -d
-#as: -n32
-#name: MIPS ld-st-la constants (ABI n32)
-#source: ldstla-n32.s
-
-.*: +file format elf32-n.*mips
-
-Disassembly of section \.text:
-
-00000000 <\.text>:
-   0:  3c020123        lui     v0,0x123
-   4:  3c0189ac        lui     at,0x89ac
-   8:  64424568        daddiu  v0,v0,17768
-   c:  0023082d        daddu   at,at,v1
-  10:  0002103c        dsll32  v0,v0,0x0
-  14:  0041102d        daddu   v0,v0,at
-  18:  dc42cdef        ld      v0,-12817\(v0\)
-  1c:  3c02abce        lui     v0,0xabce
-  20:  3c012345        lui     at,0x2345
-  24:  6442ef01        daddiu  v0,v0,-4351
-  28:  0023082d        daddu   at,at,v1
-  2c:  0002103c        dsll32  v0,v0,0x0
-  30:  0041102d        daddu   v0,v0,at
-  34:  dc426789        ld      v0,26505\(v0\)
-  38:  3c028000        lui     v0,0x8000
-  3c:  00431021        addu    v0,v0,v1
-  40:  dc420000        ld      v0,0\(v0\)
-  44:  3c020000        lui     v0,0x0
-  48:  3c010000        lui     at,0x0
-  4c:  6442ffff        daddiu  v0,v0,-1
-  50:  0023082d        daddu   at,at,v1
-  54:  0002103c        dsll32  v0,v0,0x0
-  58:  0041102d        daddu   v0,v0,at
-  5c:  dc420000        ld      v0,0\(v0\)
-  60:  3c020000        lui     v0,0x0
-  64:  3c01abce        lui     at,0xabce
-  68:  64420001        daddiu  v0,v0,1
-  6c:  0023082d        daddu   at,at,v1
-  70:  0002103c        dsll32  v0,v0,0x0
-  74:  0041102d        daddu   v0,v0,at
-  78:  dc42ef01        ld      v0,-4351\(v0\)
-  7c:  3c020123        lui     v0,0x123
-  80:  00431021        addu    v0,v0,v1
-  84:  dc424567        ld      v0,17767\(v0\)
-  88:  3c010123        lui     at,0x123
-  8c:  64214568        daddiu  at,at,17768
-  90:  00010c38        dsll    at,at,0x10
-  94:  642189ac        daddiu  at,at,-30292
-  98:  00010c38        dsll    at,at,0x10
-  9c:  0023082d        daddu   at,at,v1
-  a0:  fc22cdef        sd      v0,-12817\(at\)
-  a4:  3c01abce        lui     at,0xabce
-  a8:  6421ef01        daddiu  at,at,-4351
-  ac:  00010c38        dsll    at,at,0x10
-  b0:  64212345        daddiu  at,at,9029
-  b4:  00010c38        dsll    at,at,0x10
-  b8:  0023082d        daddu   at,at,v1
-  bc:  fc226789        sd      v0,26505\(at\)
-  c0:  3c018000        lui     at,0x8000
-  c4:  00230821        addu    at,at,v1
-  c8:  fc220000        sd      v0,0\(at\)
-  cc:  3c010000        lui     at,0x0
-  d0:  6421ffff        daddiu  at,at,-1
-  d4:  00010c38        dsll    at,at,0x10
-  d8:  64210000        daddiu  at,at,0
-  dc:  00010c38        dsll    at,at,0x10
-  e0:  0023082d        daddu   at,at,v1
-  e4:  fc220000        sd      v0,0\(at\)
-  e8:  3c010000        lui     at,0x0
-  ec:  64210001        daddiu  at,at,1
-  f0:  00010c38        dsll    at,at,0x10
-  f4:  6421abce        daddiu  at,at,-21554
-  f8:  00010c38        dsll    at,at,0x10
-  fc:  0023082d        daddu   at,at,v1
- 100:  fc22ef01        sd      v0,-4351\(at\)
- 104:  3c010123        lui     at,0x123
- 108:  00230821        addu    at,at,v1
- 10c:  fc224567        sd      v0,17767\(at\)
- 110:  3c020123        lui     v0,0x123
- 114:  3c0189ac        lui     at,0x89ac
- 118:  64424568        daddiu  v0,v0,17768
- 11c:  0023082d        daddu   at,at,v1
- 120:  0002103c        dsll32  v0,v0,0x0
- 124:  0041102d        daddu   v0,v0,at
- 128:  8c42cdef        lw      v0,-12817\(v0\)
- 12c:  3c02abce        lui     v0,0xabce
- 130:  3c012345        lui     at,0x2345
- 134:  6442ef01        daddiu  v0,v0,-4351
- 138:  0023082d        daddu   at,at,v1
- 13c:  0002103c        dsll32  v0,v0,0x0
- 140:  0041102d        daddu   v0,v0,at
- 144:  8c426789        lw      v0,26505\(v0\)
- 148:  3c028000        lui     v0,0x8000
- 14c:  00431021        addu    v0,v0,v1
- 150:  8c420000        lw      v0,0\(v0\)
- 154:  3c020000        lui     v0,0x0
- 158:  3c010000        lui     at,0x0
- 15c:  6442ffff        daddiu  v0,v0,-1
- 160:  0023082d        daddu   at,at,v1
- 164:  0002103c        dsll32  v0,v0,0x0
- 168:  0041102d        daddu   v0,v0,at
- 16c:  8c420000        lw      v0,0\(v0\)
- 170:  3c020000        lui     v0,0x0
- 174:  3c01abce        lui     at,0xabce
- 178:  64420001        daddiu  v0,v0,1
- 17c:  0023082d        daddu   at,at,v1
- 180:  0002103c        dsll32  v0,v0,0x0
- 184:  0041102d        daddu   v0,v0,at
- 188:  8c42ef01        lw      v0,-4351\(v0\)
- 18c:  3c020123        lui     v0,0x123
- 190:  00431021        addu    v0,v0,v1
- 194:  8c424567        lw      v0,17767\(v0\)
- 198:  3c010123        lui     at,0x123
- 19c:  64214568        daddiu  at,at,17768
- 1a0:  00010c38        dsll    at,at,0x10
- 1a4:  642189ac        daddiu  at,at,-30292
- 1a8:  00010c38        dsll    at,at,0x10
- 1ac:  0023082d        daddu   at,at,v1
- 1b0:  ac22cdef        sw      v0,-12817\(at\)
- 1b4:  3c01abce        lui     at,0xabce
- 1b8:  6421ef01        daddiu  at,at,-4351
- 1bc:  00010c38        dsll    at,at,0x10
- 1c0:  64212345        daddiu  at,at,9029
- 1c4:  00010c38        dsll    at,at,0x10
- 1c8:  0023082d        daddu   at,at,v1
- 1cc:  ac226789        sw      v0,26505\(at\)
- 1d0:  3c018000        lui     at,0x8000
- 1d4:  00230821        addu    at,at,v1
- 1d8:  ac220000        sw      v0,0\(at\)
- 1dc:  3c010000        lui     at,0x0
- 1e0:  6421ffff        daddiu  at,at,-1
- 1e4:  00010c38        dsll    at,at,0x10
- 1e8:  64210000        daddiu  at,at,0
- 1ec:  00010c38        dsll    at,at,0x10
- 1f0:  0023082d        daddu   at,at,v1
- 1f4:  ac220000        sw      v0,0\(at\)
- 1f8:  3c010000        lui     at,0x0
- 1fc:  64210001        daddiu  at,at,1
- 200:  00010c38        dsll    at,at,0x10
- 204:  6421abce        daddiu  at,at,-21554
- 208:  00010c38        dsll    at,at,0x10
- 20c:  0023082d        daddu   at,at,v1
- 210:  ac22ef01        sw      v0,-4351\(at\)
- 214:  3c010123        lui     at,0x123
- 218:  00230821        addu    at,at,v1
- 21c:  ac224567        sw      v0,17767\(at\)
- 220:  3c028000        lui     v0,0x8000
- 224:  3c020123        lui     v0,0x123
- 228:  34424567        ori     v0,v0,0x4567
- 22c:  3c027fff        lui     v0,0x7fff
- 230:  3442ffff        ori     v0,v0,0xffff
- 234:  3c020123        lui     v0,0x123
- 238:  34424567        ori     v0,v0,0x4567
-       \.\.\.
diff --git a/gas/testsuite/gas/mips/ldstla-n32.s b/gas/testsuite/gas/mips/ldstla-n32.s
deleted file mode 100644 (file)
index 1b5d863..0000000
--- a/gas/testsuite/gas/mips/ldstla-n32.s
+++ /dev/null
@@ -1,35 +0,0 @@
-       .text
-       ld $2, 0x0123456789abcdef($3)
-       ld $2, 0xabcdef0123456789($3)
-       ld $2, 0xffffffff80000000($3)
-       ld $2, 0xffffffff00000000($3)
-       ld $2, 0xabcdef01($3)
-       ld $2, 0x01234567($3)
-
-       sd $2, 0x0123456789abcdef($3)
-       sd $2, 0xabcdef0123456789($3)
-       sd $2, 0xffffffff80000000($3)
-       sd $2, 0xffffffff00000000($3)
-       sd $2, 0xabcdef01($3)
-       sd $2, 0x01234567($3)
-
-       lw $2, 0x0123456789abcdef($3)
-       lw $2, 0xabcdef0123456789($3)
-       lw $2, 0xffffffff80000000($3)
-       lw $2, 0xffffffff00000000($3)
-       lw $2, 0xabcdef01($3)
-       lw $2, 0x01234567($3)
-
-       sw $2, 0x0123456789abcdef($3)
-       sw $2, 0xabcdef0123456789($3)
-       sw $2, 0xffffffff80000000($3)
-       sw $2, 0xffffffff00000000($3)
-       sw $2, 0xabcdef01($3)
-       sw $2, 0x01234567($3)
-
-       dla $2, 0xffffffff80000000
-       dla $2, 0x01234567
-       la $2, 0x7fffffff
-       la $2, 0x01234567
-
-       .space 8
diff --git a/gas/testsuite/gas/mips/ldstla-n64-shared.d b/gas/testsuite/gas/mips/ldstla-n64-shared.d
index 971e296..acbbb43 100644 (file)
--- a/gas/testsuite/gas/mips/ldstla-n64-shared.d
+++ b/gas/testsuite/gas/mips/ldstla-n64-shared.d
@@ -9,173 +9,149 @@ Disassembly of section \.text:
 
 0000000000000000 <\.text>:
    0:  3c020123        lui     v0,0x123
-   4:  3c0189ac        lui     at,0x89ac
-   8:  64424568        daddiu  v0,v0,17768
-   c:  0023082d        daddu   at,at,v1
-  10:  0002103c        dsll32  v0,v0,0x0
-  14:  0041102d        daddu   v0,v0,at
+   4:  34424567        ori     v0,v0,0x4567
+   8:  00021438        dsll    v0,v0,0x10
+   c:  344289ac        ori     v0,v0,0x89ac
+  10:  00021438        dsll    v0,v0,0x10
+  14:  0043102d        daddu   v0,v0,v1
   18:  dc42cdef        ld      v0,-12817\(v0\)
-  1c:  3c02abce        lui     v0,0xabce
-  20:  3c012345        lui     at,0x2345
-  24:  6442ef01        daddiu  v0,v0,-4351
-  28:  0023082d        daddu   at,at,v1
-  2c:  0002103c        dsll32  v0,v0,0x0
-  30:  0041102d        daddu   v0,v0,at
+  1c:  3c02abcd        lui     v0,0xabcd
+  20:  3442ef01        ori     v0,v0,0xef01
+  24:  00021438        dsll    v0,v0,0x10
+  28:  34422345        ori     v0,v0,0x2345
+  2c:  00021438        dsll    v0,v0,0x10
+  30:  0043102d        daddu   v0,v0,v1
   34:  dc426789        ld      v0,26505\(v0\)
   38:  3c028000        lui     v0,0x8000
   3c:  0043102d        daddu   v0,v0,v1
   40:  dc420000        ld      v0,0\(v0\)
-  44:  3c020000        lui     v0,0x0
-  48:  3c010000        lui     at,0x0
-  4c:  6442ffff        daddiu  v0,v0,-1
-  50:  0023082d        daddu   at,at,v1
-  54:  0002103c        dsll32  v0,v0,0x0
-  58:  0041102d        daddu   v0,v0,at
-  5c:  dc420000        ld      v0,0\(v0\)
-  60:  3c028000        lui     v0,0x8000
-  64:  0043102d        daddu   v0,v0,v1
-  68:  dc42ffff        ld      v0,-1\(v0\)
-  6c:  3c020000        lui     v0,0x0
-  70:  3c01abce        lui     at,0xabce
-  74:  64420001        daddiu  v0,v0,1
-  78:  0023082d        daddu   at,at,v1
-  7c:  0002103c        dsll32  v0,v0,0x0
-  80:  0041102d        daddu   v0,v0,at
-  84:  dc42ef01        ld      v0,-4351\(v0\)
-  88:  3c020123        lui     v0,0x123
-  8c:  0043102d        daddu   v0,v0,v1
-  90:  dc424567        ld      v0,17767\(v0\)
-  94:  3c010123        lui     at,0x123
-  98:  64214568        daddiu  at,at,17768
-  9c:  00010c38        dsll    at,at,0x10
-  a0:  642189ac        daddiu  at,at,-30292
-  a4:  00010c38        dsll    at,at,0x10
-  a8:  0023082d        daddu   at,at,v1
-  ac:  fc22cdef        sd      v0,-12817\(at\)
-  b0:  3c01abce        lui     at,0xabce
-  b4:  6421ef01        daddiu  at,at,-4351
-  b8:  00010c38        dsll    at,at,0x10
-  bc:  64212345        daddiu  at,at,9029
-  c0:  00010c38        dsll    at,at,0x10
-  c4:  0023082d        daddu   at,at,v1
-  c8:  fc226789        sd      v0,26505\(at\)
-  cc:  3c018000        lui     at,0x8000
-  d0:  0023082d        daddu   at,at,v1
-  d4:  fc220000        sd      v0,0\(at\)
-  d8:  3c010000        lui     at,0x0
-  dc:  6421ffff        daddiu  at,at,-1
+  44:  2402ffff        li      v0,-1
+  48:  0002103c        dsll32  v0,v0,0x0
+  4c:  0043102d        daddu   v0,v0,v1
+  50:  dc420000        ld      v0,0\(v0\)
+  54:  3c028000        lui     v0,0x8000
+  58:  0043102d        daddu   v0,v0,v1
+  5c:  dc42ffff        ld      v0,-1\(v0\)
+  60:  3402abce        li      v0,0xabce
+  64:  00021438        dsll    v0,v0,0x10
+  68:  0043102d        daddu   v0,v0,v1
+  6c:  dc42ef01        ld      v0,-4351\(v0\)
+  70:  3c020123        lui     v0,0x123
+  74:  0043102d        daddu   v0,v0,v1
+  78:  dc424567        ld      v0,17767\(v0\)
+  7c:  3c010123        lui     at,0x123
+  80:  34214567        ori     at,at,0x4567
+  84:  00010c38        dsll    at,at,0x10
+  88:  342189ac        ori     at,at,0x89ac
+  8c:  00010c38        dsll    at,at,0x10
+  90:  0023082d        daddu   at,at,v1
+  94:  fc22cdef        sd      v0,-12817\(at\)
+  98:  3c01abcd        lui     at,0xabcd
+  9c:  3421ef01        ori     at,at,0xef01
+  a0:  00010c38        dsll    at,at,0x10
+  a4:  34212345        ori     at,at,0x2345
+  a8:  00010c38        dsll    at,at,0x10
+  ac:  0023082d        daddu   at,at,v1
+  b0:  fc226789        sd      v0,26505\(at\)
+  b4:  3c018000        lui     at,0x8000
+  b8:  0023082d        daddu   at,at,v1
+  bc:  fc220000        sd      v0,0\(at\)
+  c0:  2401ffff        li      at,-1
+  c4:  0001083c        dsll32  at,at,0x0
+  c8:  0023082d        daddu   at,at,v1
+  cc:  fc220000        sd      v0,0\(at\)
+  d0:  3c018000        lui     at,0x8000
+  d4:  0023082d        daddu   at,at,v1
+  d8:  fc22ffff        sd      v0,-1\(at\)
+  dc:  3401abce        li      at,0xabce
   e0:  00010c38        dsll    at,at,0x10
-  e4:  64210000        daddiu  at,at,0
-  e8:  00010c38        dsll    at,at,0x10
-  ec:  0023082d        daddu   at,at,v1
-  f0:  fc220000        sd      v0,0\(at\)
-  f4:  3c018000        lui     at,0x8000
-  f8:  0023082d        daddu   at,at,v1
-  fc:  fc22ffff        sd      v0,-1\(at\)
- 100:  3c010000        lui     at,0x0
- 104:  64210001        daddiu  at,at,1
- 108:  00010c38        dsll    at,at,0x10
- 10c:  6421abce        daddiu  at,at,-21554
- 110:  00010c38        dsll    at,at,0x10
- 114:  0023082d        daddu   at,at,v1
- 118:  fc22ef01        sd      v0,-4351\(at\)
- 11c:  3c010123        lui     at,0x123
- 120:  0023082d        daddu   at,at,v1
- 124:  fc224567        sd      v0,17767\(at\)
- 128:  3c020123        lui     v0,0x123
- 12c:  3c0189ac        lui     at,0x89ac
- 130:  64424568        daddiu  v0,v0,17768
- 134:  0023082d        daddu   at,at,v1
- 138:  0002103c        dsll32  v0,v0,0x0
- 13c:  0041102d        daddu   v0,v0,at
- 140:  8c42cdef        lw      v0,-12817\(v0\)
- 144:  3c02abce        lui     v0,0xabce
- 148:  3c012345        lui     at,0x2345
- 14c:  6442ef01        daddiu  v0,v0,-4351
- 150:  0023082d        daddu   at,at,v1
- 154:  0002103c        dsll32  v0,v0,0x0
- 158:  0041102d        daddu   v0,v0,at
- 15c:  8c426789        lw      v0,26505\(v0\)
- 160:  3c028000        lui     v0,0x8000
- 164:  0043102d        daddu   v0,v0,v1
- 168:  8c420000        lw      v0,0\(v0\)
- 16c:  3c020000        lui     v0,0x0
- 170:  3c010000        lui     at,0x0
- 174:  6442ffff        daddiu  v0,v0,-1
- 178:  0023082d        daddu   at,at,v1
- 17c:  0002103c        dsll32  v0,v0,0x0
- 180:  0041102d        daddu   v0,v0,at
- 184:  8c420000        lw      v0,0\(v0\)
- 188:  3c028000        lui     v0,0x8000
- 18c:  0043102d        daddu   v0,v0,v1
- 190:  8c42ffff        lw      v0,-1\(v0\)
- 194:  3c020000        lui     v0,0x0
- 198:  3c01abce        lui     at,0xabce
- 19c:  64420001        daddiu  v0,v0,1
- 1a0:  0023082d        daddu   at,at,v1
- 1a4:  0002103c        dsll32  v0,v0,0x0
- 1a8:  0041102d        daddu   v0,v0,at
- 1ac:  8c42ef01        lw      v0,-4351\(v0\)
- 1b0:  3c020123        lui     v0,0x123
- 1b4:  0043102d        daddu   v0,v0,v1
- 1b8:  8c424567        lw      v0,17767\(v0\)
- 1bc:  3c010123        lui     at,0x123
- 1c0:  64214568        daddiu  at,at,17768
- 1c4:  00010c38        dsll    at,at,0x10
- 1c8:  642189ac        daddiu  at,at,-30292
- 1cc:  00010c38        dsll    at,at,0x10
- 1d0:  0023082d        daddu   at,at,v1
- 1d4:  ac22cdef        sw      v0,-12817\(at\)
- 1d8:  3c01abce        lui     at,0xabce
- 1dc:  6421ef01        daddiu  at,at,-4351
- 1e0:  00010c38        dsll    at,at,0x10
- 1e4:  64212345        daddiu  at,at,9029
- 1e8:  00010c38        dsll    at,at,0x10
- 1ec:  0023082d        daddu   at,at,v1
- 1f0:  ac226789        sw      v0,26505\(at\)
- 1f4:  3c018000        lui     at,0x8000
- 1f8:  0023082d        daddu   at,at,v1
- 1fc:  ac220000        sw      v0,0\(at\)
- 200:  3c010000        lui     at,0x0
- 204:  6421ffff        daddiu  at,at,-1
- 208:  00010c38        dsll    at,at,0x10
- 20c:  64210000        daddiu  at,at,0
- 210:  00010c38        dsll    at,at,0x10
- 214:  0023082d        daddu   at,at,v1
- 218:  ac220000        sw      v0,0\(at\)
- 21c:  3c018000        lui     at,0x8000
- 220:  0023082d        daddu   at,at,v1
- 224:  ac22ffff        sw      v0,-1\(at\)
- 228:  3c010000        lui     at,0x0
- 22c:  64210001        daddiu  at,at,1
- 230:  00010c38        dsll    at,at,0x10
- 234:  6421abce        daddiu  at,at,-21554
- 238:  00010c38        dsll    at,at,0x10
- 23c:  0023082d        daddu   at,at,v1
- 240:  ac22ef01        sw      v0,-4351\(at\)
- 244:  3c010123        lui     at,0x123
- 248:  0023082d        daddu   at,at,v1
- 24c:  ac224567        sw      v0,17767\(at\)
- 250:  3c020123        lui     v0,0x123
- 254:  34424567        ori     v0,v0,0x4567
- 258:  00021438        dsll    v0,v0,0x10
- 25c:  344289ab        ori     v0,v0,0x89ab
- 260:  00021438        dsll    v0,v0,0x10
- 264:  3442cdef        ori     v0,v0,0xcdef
- 268:  3c02abcd        lui     v0,0xabcd
- 26c:  3442ef01        ori     v0,v0,0xef01
- 270:  00021438        dsll    v0,v0,0x10
- 274:  34422345        ori     v0,v0,0x2345
- 278:  00021438        dsll    v0,v0,0x10
- 27c:  34426789        ori     v0,v0,0x6789
- 280:  3c028000        lui     v0,0x8000
- 284:  2402ffff        li      v0,-1
- 288:  0002103c        dsll32  v0,v0,0x0
- 28c:  3402abcd        li      v0,0xabcd
- 290:  00021438        dsll    v0,v0,0x10
- 294:  3442ef01        ori     v0,v0,0xef01
- 298:  3c027fff        lui     v0,0x7fff
- 29c:  3442ffff        ori     v0,v0,0xffff
- 2a0:  3c020123        lui     v0,0x123
- 2a4:  34424567        ori     v0,v0,0x4567
+  e4:  0023082d        daddu   at,at,v1
+  e8:  fc22ef01        sd      v0,-4351\(at\)
+  ec:  3c010123        lui     at,0x123
+  f0:  0023082d        daddu   at,at,v1
+  f4:  fc224567        sd      v0,17767\(at\)
+  f8:  3c020123        lui     v0,0x123
+  fc:  34424567        ori     v0,v0,0x4567
+ 100:  00021438        dsll    v0,v0,0x10
+ 104:  344289ac        ori     v0,v0,0x89ac
+ 108:  00021438        dsll    v0,v0,0x10
+ 10c:  0043102d        daddu   v0,v0,v1
+ 110:  8c42cdef        lw      v0,-12817\(v0\)
+ 114:  3c02abcd        lui     v0,0xabcd
+ 118:  3442ef01        ori     v0,v0,0xef01
+ 11c:  00021438        dsll    v0,v0,0x10
+ 120:  34422345        ori     v0,v0,0x2345
+ 124:  00021438        dsll    v0,v0,0x10
+ 128:  0043102d        daddu   v0,v0,v1
+ 12c:  8c426789        lw      v0,26505\(v0\)
+ 130:  3c028000        lui     v0,0x8000
+ 134:  0043102d        daddu   v0,v0,v1
+ 138:  8c420000        lw      v0,0\(v0\)
+ 13c:  2402ffff        li      v0,-1
+ 140:  0002103c        dsll32  v0,v0,0x0
+ 144:  0043102d        daddu   v0,v0,v1
+ 148:  8c420000        lw      v0,0\(v0\)
+ 14c:  3c028000        lui     v0,0x8000
+ 150:  0043102d        daddu   v0,v0,v1
+ 154:  8c42ffff        lw      v0,-1\(v0\)
+ 158:  3402abce        li      v0,0xabce
+ 15c:  00021438        dsll    v0,v0,0x10
+ 160:  0043102d        daddu   v0,v0,v1
+ 164:  8c42ef01        lw      v0,-4351\(v0\)
+ 168:  3c020123        lui     v0,0x123
+ 16c:  0043102d        daddu   v0,v0,v1
+ 170:  8c424567        lw      v0,17767\(v0\)
+ 174:  3c010123        lui     at,0x123
+ 178:  34214567        ori     at,at,0x4567
+ 17c:  00010c38        dsll    at,at,0x10
+ 180:  342189ac        ori     at,at,0x89ac
+ 184:  00010c38        dsll    at,at,0x10
+ 188:  0023082d        daddu   at,at,v1
+ 18c:  ac22cdef        sw      v0,-12817\(at\)
+ 190:  3c01abcd        lui     at,0xabcd
+ 194:  3421ef01        ori     at,at,0xef01
+ 198:  00010c38        dsll    at,at,0x10
+ 19c:  34212345        ori     at,at,0x2345
+ 1a0:  00010c38        dsll    at,at,0x10
+ 1a4:  0023082d        daddu   at,at,v1
+ 1a8:  ac226789        sw      v0,26505\(at\)
+ 1ac:  3c018000        lui     at,0x8000
+ 1b0:  0023082d        daddu   at,at,v1
+ 1b4:  ac220000        sw      v0,0\(at\)
+ 1b8:  2401ffff        li      at,-1
+ 1bc:  0001083c        dsll32  at,at,0x0
+ 1c0:  0023082d        daddu   at,at,v1
+ 1c4:  ac220000        sw      v0,0\(at\)
+ 1c8:  3c018000        lui     at,0x8000
+ 1cc:  0023082d        daddu   at,at,v1
+ 1d0:  ac22ffff        sw      v0,-1\(at\)
+ 1d4:  3401abce        li      at,0xabce
+ 1d8:  00010c38        dsll    at,at,0x10
+ 1dc:  0023082d        daddu   at,at,v1
+ 1e0:  ac22ef01        sw      v0,-4351\(at\)
+ 1e4:  3c010123        lui     at,0x123
+ 1e8:  0023082d        daddu   at,at,v1
+ 1ec:  ac224567        sw      v0,17767\(at\)
+ 1f0:  3c020123        lui     v0,0x123
+ 1f4:  34424567        ori     v0,v0,0x4567
+ 1f8:  00021438        dsll    v0,v0,0x10
+ 1fc:  344289ab        ori     v0,v0,0x89ab
+ 200:  00021438        dsll    v0,v0,0x10
+ 204:  3442cdef        ori     v0,v0,0xcdef
+ 208:  3c02abcd        lui     v0,0xabcd
+ 20c:  3442ef01        ori     v0,v0,0xef01
+ 210:  00021438        dsll    v0,v0,0x10
+ 214:  34422345        ori     v0,v0,0x2345
+ 218:  00021438        dsll    v0,v0,0x10
+ 21c:  34426789        ori     v0,v0,0x6789
+ 220:  3c028000        lui     v0,0x8000
+ 224:  2402ffff        li      v0,-1
+ 228:  0002103c        dsll32  v0,v0,0x0
+ 22c:  3402abcd        li      v0,0xabcd
+ 230:  00021438        dsll    v0,v0,0x10
+ 234:  3442ef01        ori     v0,v0,0xef01
+ 238:  3c027fff        lui     v0,0x7fff
+ 23c:  3442ffff        ori     v0,v0,0xffff
+ 240:  3c020123        lui     v0,0x123
+ 244:  34424567        ori     v0,v0,0x4567
        \.\.\.
diff --git a/gas/testsuite/gas/mips/ldstla-n64-sym32.d b/gas/testsuite/gas/mips/ldstla-n64-sym32.d
new file mode 100644 (file)
index 0000000..8d30cfb
--- /dev/null
+++ b/gas/testsuite/gas/mips/ldstla-n64-sym32.d
@@ -0,0 +1,1017 @@
+#objdump: -dr
+#as: -64 -msym32 -G8 -EB
+#name: MIPS ld-st-la with sym32
+#source: ldstla-sym32.s
+
+.*file format .*
+
+Disassembly .*:
+
+0+00 <.*>:
+#
+# dla constants
+#
+.*     li      a0,0xa800
+.*     dsll32  a0,a0,0x10
+.*     li      a0,0xa800
+.*     dsll32  a0,a0,0x10
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x8000
+.*     lui     a0,0x8000
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x7fff
+.*     ori     a0,a0,0x7ff8
+.*     lui     a0,0x7fff
+.*     ori     a0,a0,0x7ff8
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x7fff
+.*     ori     a0,a0,0xfff8
+.*     lui     a0,0x7fff
+.*     ori     a0,a0,0xfff8
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x1234
+.*     ori     a0,a0,0x5678
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0x9abc
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0xdef0
+.*     lui     a0,0x1234
+.*     ori     a0,a0,0x5678
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0x9abc
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0xdef0
+.*     daddu   a0,a0,v1
+#
+# dla small_comm
+#
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+#
+# dla big_comm
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+#
+# dla small_data
+#
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  a0,gp,0
+.*: R_MIPS_GPREL16     small_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+#
+# dla big_data
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+#
+# dla extern
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu a0,a0,0
+.*: R_MIPS_LO16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+#
+# lw constants
+#
+.*     li      a0,0xa800
+.*     dsll32  a0,a0,0x10
+.*     lw      a0,0\(a0\)
+.*     li      a0,0xa800
+.*     dsll32  a0,a0,0x10
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*     lui     a0,0x8000
+.*     lw      a0,0\(a0\)
+.*     lui     a0,0x8000
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*     lui     a0,0x7fff
+.*     lw      a0,32760\(a0\)
+.*     lui     a0,0x7fff
+.*     daddu   a0,a0,v1
+.*     lw      a0,32760\(a0\)
+.*     li      a0,0x8000
+.*     dsll    a0,a0,0x10
+.*     lw      a0,-8\(a0\)
+.*     li      a0,0x8000
+.*     dsll    a0,a0,0x10
+.*     daddu   a0,a0,v1
+.*     lw      a0,-8\(a0\)
+.*     lui     a0,0x1234
+.*     ori     a0,a0,0x5678
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0x9abd
+.*     dsll    a0,a0,0x10
+.*     lw      a0,-8464\(a0\)
+.*     lui     a0,0x1234
+.*     ori     a0,a0,0x5678
+.*     dsll    a0,a0,0x10
+.*     ori     a0,a0,0x9abd
+.*     dsll    a0,a0,0x10
+.*     daddu   a0,a0,v1
+.*     lw      a0,-8464\(a0\)
+#
+# lw small_comm
+#
+.*     lw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,v1,gp
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_GPREL16     small_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,v1,gp
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_GPREL16     small_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# lw big_comm
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# lw small_data
+#
+.*     lw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,v1,gp
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_GPREL16     small_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,v1,gp
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_GPREL16     small_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# lw big_data
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# lw extern
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   a0,a0,v1
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# sw constants
+#
+.*     li      at,0xa800
+.*     dsll32  at,at,0x10
+.*     sw      a0,0\(at\)
+.*     li      at,0xa800
+.*     dsll32  at,at,0x10
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*     lui     at,0x8000
+.*     sw      a0,0\(at\)
+.*     lui     at,0x8000
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*     lui     at,0x7fff
+.*     sw      a0,32760\(at\)
+.*     lui     at,0x7fff
+.*     daddu   at,at,v1
+.*     sw      a0,32760\(at\)
+.*     li      at,0x8000
+.*     dsll    at,at,0x10
+.*     sw      a0,-8\(at\)
+.*     li      at,0x8000
+.*     dsll    at,at,0x10
+.*     daddu   at,at,v1
+.*     sw      a0,-8\(at\)
+.*     lui     at,0x1234
+.*     ori     at,at,0x5678
+.*     dsll    at,at,0x10
+.*     ori     at,at,0x9abd
+.*     dsll    at,at,0x10
+.*     sw      a0,-8464\(at\)
+.*     lui     at,0x1234
+.*     ori     at,at,0x5678
+.*     dsll    at,at,0x10
+.*     ori     at,at,0x9abd
+.*     dsll    at,at,0x10
+.*     daddu   at,at,v1
+.*     sw      a0,-8464\(at\)
+#
+# sw small_comm
+#
+.*     sw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,v1,gp
+.*     sw      a0,0\(at\)
+.*: R_MIPS_GPREL16     small_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,v1,gp
+.*     sw      a0,0\(at\)
+.*: R_MIPS_GPREL16     small_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# sw big_comm
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# sw small_data
+#
+.*     sw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,v1,gp
+.*     sw      a0,0\(at\)
+.*: R_MIPS_GPREL16     small_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(gp\)
+.*: R_MIPS_GPREL16     small_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,v1,gp
+.*     sw      a0,0\(at\)
+.*: R_MIPS_GPREL16     small_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# sw big_data
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# sw extern
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+#
+# usw constants
+#
+.*     li      at,0xa800
+.*     dsll32  at,at,0x10
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     li      at,0xa800
+.*     dsll32  at,at,0x10
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x8000
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x8000
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x7fff
+.*     ori     at,at,0x7ff8
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x7fff
+.*     ori     at,at,0x7ff8
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x7fff
+.*     ori     at,at,0xfff8
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x7fff
+.*     ori     at,at,0xfff8
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x1234
+.*     ori     at,at,0x5678
+.*     dsll    at,at,0x10
+.*     ori     at,at,0x9abc
+.*     dsll    at,at,0x10
+.*     ori     at,at,0xdef0
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x1234
+.*     ori     at,at,0x5678
+.*     dsll    at,at,0x10
+.*     ori     at,at,0x9abc
+.*     dsll    at,at,0x10
+.*     ori     at,at,0xdef0
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw small_comm
+#
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw big_comm
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_comm
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_comm\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw small_data
+#
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     daddiu  at,gp,0
+.*: R_MIPS_GPREL16     small_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw big_data
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_data
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        big_data\+0x3
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# usw extern
+#
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        extern\+0x34000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     d?addiu at,at,0
+.*: R_MIPS_LO16        extern\+0xfffffffffffcc000
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddu   at,at,v1
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# with sym32 off
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HIGHEST     extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  a0,a0,0
+.*: R_MIPS_HIGHER      extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  at,at,0
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     dsll32  a0,a0,0x0
+.*     daddu   a0,a0,at
+.*     lui     a0,0x0
+.*: R_MIPS_HIGHEST     extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  a0,a0,0
+.*: R_MIPS_HIGHER      extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     dsll32  a0,a0,0x0
+.*     daddu   a0,a0,at
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HIGHEST     extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  at,at,0
+.*: R_MIPS_HIGHER      extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     dsll    at,at,0x10
+.*     daddiu  at,at,0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     dsll    at,at,0x10
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HIGHEST     extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  at,at,0
+.*: R_MIPS_HIGHER      extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     dsll    at,at,0x10
+.*     daddiu  at,at,0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     dsll    at,at,0x10
+.*     daddiu  at,at,0
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#
+# ...and back on again
+#
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  a0,a0,0
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     a0,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lw      a0,0\(a0\)
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     sw      a0,0\(at\)
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     lui     at,0x0
+.*: R_MIPS_HI16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     daddiu  at,at,0
+.*: R_MIPS_LO16        extern
+.*: R_MIPS_NONE        .*
+.*: R_MIPS_NONE        .*
+.*     swl     a0,0\(at\)
+.*     swr     a0,3\(at\)
+#pass
diff --git a/gas/testsuite/gas/mips/ldstla-n64.d b/gas/testsuite/gas/mips/ldstla-n64.d
index 7068b90..4425e9c 100644 (file)
--- a/gas/testsuite/gas/mips/ldstla-n64.d
+++ b/gas/testsuite/gas/mips/ldstla-n64.d
@@ -9,173 +9,149 @@ Disassembly of section \.text:
 
 0000000000000000 <\.text>:
    0:  3c020123        lui     v0,0x123
-   4:  3c0189ac        lui     at,0x89ac
-   8:  64424568        daddiu  v0,v0,17768
-   c:  0023082d        daddu   at,at,v1
-  10:  0002103c        dsll32  v0,v0,0x0
-  14:  0041102d        daddu   v0,v0,at
+   4:  34424567        ori     v0,v0,0x4567
+   8:  00021438        dsll    v0,v0,0x10
+   c:  344289ac        ori     v0,v0,0x89ac
+  10:  00021438        dsll    v0,v0,0x10
+  14:  0043102d        daddu   v0,v0,v1
   18:  dc42cdef        ld      v0,-12817\(v0\)
-  1c:  3c02abce        lui     v0,0xabce
-  20:  3c012345        lui     at,0x2345
-  24:  6442ef01        daddiu  v0,v0,-4351
-  28:  0023082d        daddu   at,at,v1
-  2c:  0002103c        dsll32  v0,v0,0x0
-  30:  0041102d        daddu   v0,v0,at
+  1c:  3c02abcd        lui     v0,0xabcd
+  20:  3442ef01        ori     v0,v0,0xef01
+  24:  00021438        dsll    v0,v0,0x10
+  28:  34422345        ori     v0,v0,0x2345
+  2c:  00021438        dsll    v0,v0,0x10
+  30:  0043102d        daddu   v0,v0,v1
   34:  dc426789        ld      v0,26505\(v0\)
   38:  3c028000        lui     v0,0x8000
   3c:  0043102d        daddu   v0,v0,v1
   40:  dc420000        ld      v0,0\(v0\)
-  44:  3c020000        lui     v0,0x0
-  48:  3c010000        lui     at,0x0
-  4c:  6442ffff        daddiu  v0,v0,-1
-  50:  0023082d        daddu   at,at,v1
-  54:  0002103c        dsll32  v0,v0,0x0
-  58:  0041102d        daddu   v0,v0,at
-  5c:  dc420000        ld      v0,0\(v0\)
-  60:  3c028000        lui     v0,0x8000
-  64:  0043102d        daddu   v0,v0,v1
-  68:  dc42ffff        ld      v0,-1\(v0\)
-  6c:  3c020000        lui     v0,0x0
-  70:  3c01abce        lui     at,0xabce
-  74:  64420001        daddiu  v0,v0,1
-  78:  0023082d        daddu   at,at,v1
-  7c:  0002103c        dsll32  v0,v0,0x0
-  80:  0041102d        daddu   v0,v0,at
-  84:  dc42ef01        ld      v0,-4351\(v0\)
-  88:  3c020123        lui     v0,0x123
-  8c:  0043102d        daddu   v0,v0,v1
-  90:  dc424567        ld      v0,17767\(v0\)
-  94:  3c010123        lui     at,0x123
-  98:  64214568        daddiu  at,at,17768
-  9c:  00010c38        dsll    at,at,0x10
-  a0:  642189ac        daddiu  at,at,-30292
-  a4:  00010c38        dsll    at,at,0x10
-  a8:  0023082d        daddu   at,at,v1
-  ac:  fc22cdef        sd      v0,-12817\(at\)
-  b0:  3c01abce        lui     at,0xabce
-  b4:  6421ef01        daddiu  at,at,-4351
-  b8:  00010c38        dsll    at,at,0x10
-  bc:  64212345        daddiu  at,at,9029
-  c0:  00010c38        dsll    at,at,0x10
-  c4:  0023082d        daddu   at,at,v1
-  c8:  fc226789        sd      v0,26505\(at\)
-  cc:  3c018000        lui     at,0x8000
-  d0:  0023082d        daddu   at,at,v1
-  d4:  fc220000        sd      v0,0\(at\)
-  d8:  3c010000        lui     at,0x0
-  dc:  6421ffff        daddiu  at,at,-1
+  44:  2402ffff        li      v0,-1
+  48:  0002103c        dsll32  v0,v0,0x0
+  4c:  0043102d        daddu   v0,v0,v1
+  50:  dc420000        ld      v0,0\(v0\)
+  54:  3c028000        lui     v0,0x8000
+  58:  0043102d        daddu   v0,v0,v1
+  5c:  dc42ffff        ld      v0,-1\(v0\)
+  60:  3402abce        li      v0,0xabce
+  64:  00021438        dsll    v0,v0,0x10
+  68:  0043102d        daddu   v0,v0,v1
+  6c:  dc42ef01        ld      v0,-4351\(v0\)
+  70:  3c020123        lui     v0,0x123
+  74:  0043102d        daddu   v0,v0,v1
+  78:  dc424567        ld      v0,17767\(v0\)
+  7c:  3c010123        lui     at,0x123
+  80:  34214567        ori     at,at,0x4567
+  84:  00010c38        dsll    at,at,0x10
+  88:  342189ac        ori     at,at,0x89ac
+  8c:  00010c38        dsll    at,at,0x10
+  90:  0023082d        daddu   at,at,v1
+  94:  fc22cdef        sd      v0,-12817\(at\)
+  98:  3c01abcd        lui     at,0xabcd
+  9c:  3421ef01        ori     at,at,0xef01
+  a0:  00010c38        dsll    at,at,0x10
+  a4:  34212345        ori     at,at,0x2345
+  a8:  00010c38        dsll    at,at,0x10
+  ac:  0023082d        daddu   at,at,v1
+  b0:  fc226789        sd      v0,26505\(at\)
+  b4:  3c018000        lui     at,0x8000
+  b8:  0023082d        daddu   at,at,v1
+  bc:  fc220000        sd      v0,0\(at\)
+  c0:  2401ffff        li      at,-1
+  c4:  0001083c        dsll32  at,at,0x0
+  c8:  0023082d        daddu   at,at,v1
+  cc:  fc220000        sd      v0,0\(at\)
+  d0:  3c018000        lui     at,0x8000
+  d4:  0023082d        daddu   at,at,v1
+  d8:  fc22ffff        sd      v0,-1\(at\)
+  dc:  3401abce        li      at,0xabce
   e0:  00010c38        dsll    at,at,0x10
-  e4:  64210000        daddiu  at,at,0
-  e8:  00010c38        dsll    at,at,0x10
-  ec:  0023082d        daddu   at,at,v1
-  f0:  fc220000        sd      v0,0\(at\)
-  f4:  3c018000        lui     at,0x8000
-  f8:  0023082d        daddu   at,at,v1
-  fc:  fc22ffff        sd      v0,-1\(at\)
- 100:  3c010000        lui     at,0x0
- 104:  64210001        daddiu  at,at,1
- 108:  00010c38        dsll    at,at,0x10
- 10c:  6421abce        daddiu  at,at,-21554
- 110:  00010c38        dsll    at,at,0x10
- 114:  0023082d        daddu   at,at,v1
- 118:  fc22ef01        sd      v0,-4351\(at\)
- 11c:  3c010123        lui     at,0x123
- 120:  0023082d        daddu   at,at,v1
- 124:  fc224567        sd      v0,17767\(at\)
- 128:  3c020123        lui     v0,0x123
- 12c:  3c0189ac        lui     at,0x89ac
- 130:  64424568        daddiu  v0,v0,17768
- 134:  0023082d        daddu   at,at,v1
- 138:  0002103c        dsll32  v0,v0,0x0
- 13c:  0041102d        daddu   v0,v0,at
- 140:  8c42cdef        lw      v0,-12817\(v0\)
- 144:  3c02abce        lui     v0,0xabce
- 148:  3c012345        lui     at,0x2345
- 14c:  6442ef01        daddiu  v0,v0,-4351
- 150:  0023082d        daddu   at,at,v1
- 154:  0002103c        dsll32  v0,v0,0x0
- 158:  0041102d        daddu   v0,v0,at
- 15c:  8c426789        lw      v0,26505\(v0\)
- 160:  3c028000        lui     v0,0x8000
- 164:  0043102d        daddu   v0,v0,v1
- 168:  8c420000        lw      v0,0\(v0\)
- 16c:  3c020000        lui     v0,0x0
- 170:  3c010000        lui     at,0x0
- 174:  6442ffff        daddiu  v0,v0,-1
- 178:  0023082d        daddu   at,at,v1
- 17c:  0002103c        dsll32  v0,v0,0x0
- 180:  0041102d        daddu   v0,v0,at
- 184:  8c420000        lw      v0,0\(v0\)
- 188:  3c028000        lui     v0,0x8000
- 18c:  0043102d        daddu   v0,v0,v1
- 190:  8c42ffff        lw      v0,-1\(v0\)
- 194:  3c020000        lui     v0,0x0
- 198:  3c01abce        lui     at,0xabce
- 19c:  64420001        daddiu  v0,v0,1
- 1a0:  0023082d        daddu   at,at,v1
- 1a4:  0002103c        dsll32  v0,v0,0x0
- 1a8:  0041102d        daddu   v0,v0,at
- 1ac:  8c42ef01        lw      v0,-4351\(v0\)
- 1b0:  3c020123        lui     v0,0x123
- 1b4:  0043102d        daddu   v0,v0,v1
- 1b8:  8c424567        lw      v0,17767\(v0\)
- 1bc:  3c010123        lui     at,0x123
- 1c0:  64214568        daddiu  at,at,17768
- 1c4:  00010c38        dsll    at,at,0x10
- 1c8:  642189ac        daddiu  at,at,-30292
- 1cc:  00010c38        dsll    at,at,0x10
- 1d0:  0023082d        daddu   at,at,v1
- 1d4:  ac22cdef        sw      v0,-12817\(at\)
- 1d8:  3c01abce        lui     at,0xabce
- 1dc:  6421ef01        daddiu  at,at,-4351
- 1e0:  00010c38        dsll    at,at,0x10
- 1e4:  64212345        daddiu  at,at,9029
- 1e8:  00010c38        dsll    at,at,0x10
- 1ec:  0023082d        daddu   at,at,v1
- 1f0:  ac226789        sw      v0,26505\(at\)
- 1f4:  3c018000        lui     at,0x8000
- 1f8:  0023082d        daddu   at,at,v1
- 1fc:  ac220000        sw      v0,0\(at\)
- 200:  3c010000        lui     at,0x0
- 204:  6421ffff        daddiu  at,at,-1
- 208:  00010c38        dsll    at,at,0x10
- 20c:  64210000        daddiu  at,at,0
- 210:  00010c38        dsll    at,at,0x10
- 214:  0023082d        daddu   at,at,v1
- 218:  ac220000        sw      v0,0\(at\)
- 21c:  3c018000        lui     at,0x8000
- 220:  0023082d        daddu   at,at,v1
- 224:  ac22ffff        sw      v0,-1\(at\)
- 228:  3c010000        lui     at,0x0
- 22c:  64210001        daddiu  at,at,1
- 230:  00010c38        dsll    at,at,0x10
- 234:  6421abce        daddiu  at,at,-21554
- 238:  00010c38        dsll    at,at,0x10
- 23c:  0023082d        daddu   at,at,v1
- 240:  ac22ef01        sw      v0,-4351\(at\)
- 244:  3c010123        lui     at,0x123
- 248:  0023082d        daddu   at,at,v1
- 24c:  ac224567        sw      v0,17767\(at\)
- 250:  3c020123        lui     v0,0x123
- 254:  34424567        ori     v0,v0,0x4567
- 258:  00021438        dsll    v0,v0,0x10
- 25c:  344289ab        ori     v0,v0,0x89ab
- 260:  00021438        dsll    v0,v0,0x10
- 264:  3442cdef        ori     v0,v0,0xcdef
- 268:  3c02abcd        lui     v0,0xabcd
- 26c:  3442ef01        ori     v0,v0,0xef01
- 270:  00021438        dsll    v0,v0,0x10
- 274:  34422345        ori     v0,v0,0x2345
- 278:  00021438        dsll    v0,v0,0x10
- 27c:  34426789        ori     v0,v0,0x6789
- 280:  3c028000        lui     v0,0x8000
- 284:  2402ffff        li      v0,-1
- 288:  0002103c        dsll32  v0,v0,0x0
- 28c:  3402abcd        li      v0,0xabcd
- 290:  00021438        dsll    v0,v0,0x10
- 294:  3442ef01        ori     v0,v0,0xef01
- 298:  3c027fff        lui     v0,0x7fff
- 29c:  3442ffff        ori     v0,v0,0xffff
- 2a0:  3c020123        lui     v0,0x123
- 2a4:  34424567        ori     v0,v0,0x4567
+  e4:  0023082d        daddu   at,at,v1
+  e8:  fc22ef01        sd      v0,-4351\(at\)
+  ec:  3c010123        lui     at,0x123
+  f0:  0023082d        daddu   at,at,v1
+  f4:  fc224567        sd      v0,17767\(at\)
+  f8:  3c020123        lui     v0,0x123
+  fc:  34424567        ori     v0,v0,0x4567
+ 100:  00021438        dsll    v0,v0,0x10
+ 104:  344289ac        ori     v0,v0,0x89ac
+ 108:  00021438        dsll    v0,v0,0x10
+ 10c:  0043102d        daddu   v0,v0,v1
+ 110:  8c42cdef        lw      v0,-12817\(v0\)
+ 114:  3c02abcd        lui     v0,0xabcd
+ 118:  3442ef01        ori     v0,v0,0xef01
+ 11c:  00021438        dsll    v0,v0,0x10
+ 120:  34422345        ori     v0,v0,0x2345
+ 124:  00021438        dsll    v0,v0,0x10
+ 128:  0043102d        daddu   v0,v0,v1
+ 12c:  8c426789        lw      v0,26505\(v0\)
+ 130:  3c028000        lui     v0,0x8000
+ 134:  0043102d        daddu   v0,v0,v1
+ 138:  8c420000        lw      v0,0\(v0\)
+ 13c:  2402ffff        li      v0,-1
+ 140:  0002103c        dsll32  v0,v0,0x0
+ 144:  0043102d        daddu   v0,v0,v1
+ 148:  8c420000        lw      v0,0\(v0\)
+ 14c:  3c028000        lui     v0,0x8000
+ 150:  0043102d        daddu   v0,v0,v1
+ 154:  8c42ffff        lw      v0,-1\(v0\)
+ 158:  3402abce        li      v0,0xabce
+ 15c:  00021438        dsll    v0,v0,0x10
+ 160:  0043102d        daddu   v0,v0,v1
+ 164:  8c42ef01        lw      v0,-4351\(v0\)
+ 168:  3c020123        lui     v0,0x123
+ 16c:  0043102d        daddu   v0,v0,v1
+ 170:  8c424567        lw      v0,17767\(v0\)
+ 174:  3c010123        lui     at,0x123
+ 178:  34214567        ori     at,at,0x4567
+ 17c:  00010c38        dsll    at,at,0x10
+ 180:  342189ac        ori     at,at,0x89ac
+ 184:  00010c38        dsll    at,at,0x10
+ 188:  0023082d        daddu   at,at,v1
+ 18c:  ac22cdef        sw      v0,-12817\(at\)
+ 190:  3c01abcd        lui     at,0xabcd
+ 194:  3421ef01        ori     at,at,0xef01
+ 198:  00010c38        dsll    at,at,0x10
+ 19c:  34212345        ori     at,at,0x2345
+ 1a0:  00010c38        dsll    at,at,0x10
+ 1a4:  0023082d        daddu   at,at,v1
+ 1a8:  ac226789        sw      v0,26505\(at\)
+ 1ac:  3c018000        lui     at,0x8000
+ 1b0:  0023082d        daddu   at,at,v1
+ 1b4:  ac220000        sw      v0,0\(at\)
+ 1b8:  2401ffff        li      at,-1
+ 1bc:  0001083c        dsll32  at,at,0x0
+ 1c0:  0023082d        daddu   at,at,v1
+ 1c4:  ac220000        sw      v0,0\(at\)
+ 1c8:  3c018000        lui     at,0x8000
+ 1cc:  0023082d        daddu   at,at,v1
+ 1d0:  ac22ffff        sw      v0,-1\(at\)
+ 1d4:  3401abce        li      at,0xabce
+ 1d8:  00010c38        dsll    at,at,0x10
+ 1dc:  0023082d        daddu   at,at,v1
+ 1e0:  ac22ef01        sw      v0,-4351\(at\)
+ 1e4:  3c010123        lui     at,0x123
+ 1e8:  0023082d        daddu   at,at,v1
+ 1ec:  ac224567        sw      v0,17767\(at\)
+ 1f0:  3c020123        lui     v0,0x123
+ 1f4:  34424567        ori     v0,v0,0x4567
+ 1f8:  00021438        dsll    v0,v0,0x10
+ 1fc:  344289ab        ori     v0,v0,0x89ab
+ 200:  00021438        dsll    v0,v0,0x10
+ 204:  3442cdef        ori     v0,v0,0xcdef
+ 208:  3c02abcd        lui     v0,0xabcd
+ 20c:  3442ef01        ori     v0,v0,0xef01
+ 210:  00021438        dsll    v0,v0,0x10
+ 214:  34422345        ori     v0,v0,0x2345
+ 218:  00021438        dsll    v0,v0,0x10
+ 21c:  34426789        ori     v0,v0,0x6789
+ 220:  3c028000        lui     v0,0x8000
+ 224:  2402ffff        li      v0,-1
+ 228:  0002103c        dsll32  v0,v0,0x0
+ 22c:  3402abcd        li      v0,0xabcd
+ 230:  00021438        dsll    v0,v0,0x10
+ 234:  3442ef01        ori     v0,v0,0xef01
+ 238:  3c027fff        lui     v0,0x7fff
+ 23c:  3442ffff        ori     v0,v0,0xffff
+ 240:  3c020123        lui     v0,0x123
+ 244:  34424567        ori     v0,v0,0x4567
        \.\.\.
diff --git a/gas/testsuite/gas/mips/ldstla-sym32.s b/gas/testsuite/gas/mips/ldstla-sym32.s
new file mode 100644 (file)
index 0000000..d89166d
--- /dev/null
+++ b/gas/testsuite/gas/mips/ldstla-sym32.s
@@ -0,0 +1,176 @@
+       dla     $4,0xa800000000000000
+       dla     $4,0xa800000000000000($3)
+       dla     $4,0xffffffff80000000
+       dla     $4,0xffffffff80000000($3)
+       dla     $4,0x000000007fff7ff8
+       dla     $4,0x000000007fff7ff8($3)
+       dla     $4,0x000000007ffffff8
+       dla     $4,0x000000007ffffff8($3)
+       dla     $4,0x123456789abcdef0
+       dla     $4,0x123456789abcdef0($3)
+
+       dla     $4,small_comm
+       dla     $4,small_comm($3)
+       dla     $4,small_comm+3
+       dla     $4,small_comm+3($3)
+
+       dla     $4,big_comm
+       dla     $4,big_comm($3)
+       dla     $4,big_comm+3
+       dla     $4,big_comm+3($3)
+
+       dla     $4,small_data
+       dla     $4,small_data($3)
+       dla     $4,small_data+3
+       dla     $4,small_data+3($3)
+
+       dla     $4,big_data
+       dla     $4,big_data($3)
+       dla     $4,big_data+3
+       dla     $4,big_data+3($3)
+
+       dla     $4,extern
+       dla     $4,extern($3)
+       dla     $4,extern + 0x34000
+       dla     $4,extern + 0x34000($3)
+       dla     $4,extern - 0x34000
+       dla     $4,extern - 0x34000($3)
+
+       lw      $4,0xa800000000000000
+       lw      $4,0xa800000000000000($3)
+       lw      $4,0xffffffff80000000
+       lw      $4,0xffffffff80000000($3)
+       lw      $4,0x000000007fff7ff8
+       lw      $4,0x000000007fff7ff8($3)
+       lw      $4,0x000000007ffffff8
+       lw      $4,0x000000007ffffff8($3)
+       lw      $4,0x123456789abcdef0
+       lw      $4,0x123456789abcdef0($3)
+
+       lw      $4,small_comm
+       lw      $4,small_comm($3)
+       lw      $4,small_comm+3
+       lw      $4,small_comm+3($3)
+
+       lw      $4,big_comm
+       lw      $4,big_comm($3)
+       lw      $4,big_comm+3
+       lw      $4,big_comm+3($3)
+
+       lw      $4,small_data
+       lw      $4,small_data($3)
+       lw      $4,small_data+3
+       lw      $4,small_data+3($3)
+
+       lw      $4,big_data
+       lw      $4,big_data($3)
+       lw      $4,big_data+3
+       lw      $4,big_data+3($3)
+
+       lw      $4,extern
+       lw      $4,extern($3)
+       lw      $4,extern + 0x34000
+       lw      $4,extern + 0x34000($3)
+       lw      $4,extern - 0x34000
+       lw      $4,extern - 0x34000($3)
+
+       sw      $4,0xa800000000000000
+       sw      $4,0xa800000000000000($3)
+       sw      $4,0xffffffff80000000
+       sw      $4,0xffffffff80000000($3)
+       sw      $4,0x000000007fff7ff8
+       sw      $4,0x000000007fff7ff8($3)
+       sw      $4,0x000000007ffffff8
+       sw      $4,0x000000007ffffff8($3)
+       sw      $4,0x123456789abcdef0
+       sw      $4,0x123456789abcdef0($3)
+
+       sw      $4,small_comm
+       sw      $4,small_comm($3)
+       sw      $4,small_comm+3
+       sw      $4,small_comm+3($3)
+
+       sw      $4,big_comm
+       sw      $4,big_comm($3)
+       sw      $4,big_comm+3
+       sw      $4,big_comm+3($3)
+
+       sw      $4,small_data
+       sw      $4,small_data($3)
+       sw      $4,small_data+3
+       sw      $4,small_data+3($3)
+
+       sw      $4,big_data
+       sw      $4,big_data($3)
+       sw      $4,big_data+3
+       sw      $4,big_data+3($3)
+
+       sw      $4,extern
+       sw      $4,extern($3)
+       sw      $4,extern + 0x34000
+       sw      $4,extern + 0x34000($3)
+       sw      $4,extern - 0x34000
+       sw      $4,extern - 0x34000($3)
+
+       usw     $4,0xa800000000000000
+       usw     $4,0xa800000000000000($3)
+       usw     $4,0xffffffff80000000
+       usw     $4,0xffffffff80000000($3)
+       usw     $4,0x000000007fff7ff8
+       usw     $4,0x000000007fff7ff8($3)
+       usw     $4,0x000000007ffffff8
+       usw     $4,0x000000007ffffff8($3)
+       usw     $4,0x123456789abcdef0
+       usw     $4,0x123456789abcdef0($3)
+
+       usw     $4,small_comm
+       usw     $4,small_comm($3)
+       usw     $4,small_comm+3
+       usw     $4,small_comm+3($3)
+
+       usw     $4,big_comm
+       usw     $4,big_comm($3)
+       usw     $4,big_comm+3
+       usw     $4,big_comm+3($3)
+
+       usw     $4,small_data
+       usw     $4,small_data($3)
+       usw     $4,small_data+3
+       usw     $4,small_data+3($3)
+
+       usw     $4,big_data
+       usw     $4,big_data($3)
+       usw     $4,big_data+3
+       usw     $4,big_data+3($3)
+
+       usw     $4,extern
+       usw     $4,extern($3)
+       usw     $4,extern + 0x34000
+       usw     $4,extern + 0x34000($3)
+       usw     $4,extern - 0x34000
+       usw     $4,extern - 0x34000($3)
+
+       .set    nosym32
+       dla     $4,extern
+       lw      $4,extern
+       sw      $4,extern
+       usw     $4,extern
+
+       .set    sym32
+       dla     $4,extern
+       lw      $4,extern
+       sw      $4,extern
+       usw     $4,extern
+
+       .section        .sdata
+       .globl  small_data
+small_data:
+       .fill   16
+
+       .data
+       .globl  big_data
+big_data:
+       .fill   16
+
+       .comm   small_comm,8
+       .comm   big_comm,16
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 2ea3360..3a1fc12 100644 (file)
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -726,11 +726,11 @@ if { [istarget mips*-*-*] } then {
 
     run_dump_test "ldstla-32"
     run_dump_test "ldstla-32-shared"
+    run_dump_test "ldstla-eabi64"
     if $has_newabi {
-       run_dump_test "ldstla-n32"
-       run_dump_test "ldstla-n32-shared"
        run_dump_test "ldstla-n64"
        run_dump_test "ldstla-n64-shared"
+       run_dump_test "ldstla-n64-sym32"
     }
 
     run_dump_test "macro-warn-1"
Domain: System / Toolchain;