drm/amd/powerplay: delete dead code in smumgr

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
index cc67d22..7c9aba8 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
@@ -101,30 +101,12 @@ extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
 extern int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
                                        uint16_t msg, uint32_t parameter);
 
-extern int smum_wait_on_register(struct pp_hwmgr *hwmgr,
-                               uint32_t index, uint32_t value, uint32_t mask);
-
-extern int smum_wait_for_register_unequal(struct pp_hwmgr *hwmgr,
-                               uint32_t index, uint32_t value, uint32_t mask);
-
-extern int smum_wait_on_indirect_register(struct pp_hwmgr *hwmgr,
-                               uint32_t indirect_port, uint32_t index,
-                               uint32_t value, uint32_t mask);
-
-
-extern void smum_wait_for_indirect_register_unequal(
-                               struct pp_hwmgr *hwmgr,
-                               uint32_t indirect_port, uint32_t index,
-                               uint32_t value, uint32_t mask);
-
-
 extern int smu_allocate_memory(void *device, uint32_t size,
                         enum cgs_gpu_mem_type type,
                         uint32_t byte_align, uint64_t *mc_addr,
                         void **kptr, void *handle);
 
 extern int smu_free_memory(void *device, void *handle);
-extern int vega10_smum_init(struct pp_hwmgr *hwmgr);
 
 extern int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr);
 
@@ -147,19 +129,5 @@ extern int smum_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr,
 
 extern bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr);
 
-#define SMUM_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
-
-#define SMUM_FIELD_MASK(reg, field) reg##__##field##_MASK
-
-
-#define SMUM_GET_FIELD(value, reg, field)                              \
-               (((value) & SMUM_FIELD_MASK(reg, field))                \
-               >> SMUM_FIELD_SHIFT(reg, field))
-
-
-#define SMUM_READ_INDIRECT_FIELD(device, port, reg, field) \
-           SMUM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
-                          reg, field)
-
 
 #endif

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
index d3c12e0..8673884 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c
@@ -144,93 +144,6 @@ int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
                                                hwmgr, msg, parameter);
 }
 
-/*
- * Returns once the part of the register indicated by the mask has
- * reached the given value.
- */
-int smum_wait_on_register(struct pp_hwmgr *hwmgr,
-                               uint32_t index,
-                               uint32_t value, uint32_t mask)
-{
-       uint32_t i;
-       uint32_t cur_value;
-
-       if (hwmgr == NULL || hwmgr->device == NULL)
-               return -EINVAL;
-
-       for (i = 0; i < hwmgr->usec_timeout; i++) {
-               cur_value = cgs_read_register(hwmgr->device, index);
-               if ((cur_value & mask) == (value & mask))
-                       break;
-               udelay(1);
-       }
-
-       /* timeout means wrong logic*/
-       if (i == hwmgr->usec_timeout)
-               return -1;
-
-       return 0;
-}
-
-int smum_wait_for_register_unequal(struct pp_hwmgr *hwmgr,
-                                       uint32_t index,
-                                       uint32_t value, uint32_t mask)
-{
-       uint32_t i;
-       uint32_t cur_value;
-
-       if (hwmgr == NULL)
-               return -EINVAL;
-
-       for (i = 0; i < hwmgr->usec_timeout; i++) {
-               cur_value = cgs_read_register(hwmgr->device,
-                                                                       index);
-               if ((cur_value & mask) != (value & mask))
-                       break;
-               udelay(1);
-       }
-
-       /* timeout means wrong logic */
-       if (i == hwmgr->usec_timeout)
-               return -1;
-
-       return 0;
-}
-
-
-/*
- * Returns once the part of the register indicated by the mask
- * has reached the given value.The indirect space is described by
- * giving the memory-mapped index of the indirect index register.
- */
-int smum_wait_on_indirect_register(struct pp_hwmgr *hwmgr,
-                                       uint32_t indirect_port,
-                                       uint32_t index,
-                                       uint32_t value,
-                                       uint32_t mask)
-{
-       if (hwmgr == NULL || hwmgr->device == NULL)
-               return -EINVAL;
-
-       cgs_write_register(hwmgr->device, indirect_port, index);
-       return smum_wait_on_register(hwmgr, indirect_port + 1,
-                                               mask, value);
-}
-
-void smum_wait_for_indirect_register_unequal(
-                                               struct pp_hwmgr *hwmgr,
-                                               uint32_t indirect_port,
-                                               uint32_t index,
-                                               uint32_t value,
-                                               uint32_t mask)
-{
-       if (hwmgr == NULL || hwmgr->device == NULL)
-               return;
-       cgs_write_register(hwmgr->device, indirect_port, index);
-       smum_wait_for_register_unequal(hwmgr, indirect_port + 1,
-                                               value, mask);
-}
-
 int smu_allocate_memory(void *device, uint32_t size,
                         enum cgs_gpu_mem_type type,
                         uint32_t byte_align, uint64_t *mc_addr,