x86: cpu: Report address width from cpu_get_info()
authorSimon Glass <sjg@chromium.org>
Tue, 22 Sep 2020 18:45:26 +0000 (12:45 -0600)
committerBin Meng <bmeng.cn@gmail.com>
Fri, 25 Sep 2020 03:27:21 +0000 (11:27 +0800)
Add support for this new field in the common code used by most x86 CPU
drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/i386/cpu.c
arch/x86/cpu/intel_common/cpu.c
arch/x86/cpu/x86_64/cpu.c
arch/x86/include/asm/cpu.h

index 8f342dd06e2588ec8c05841293f7663c1c57b4aa..7517b756f4369857ac6e7f561224114b2bb58a4d 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define CPUID_FEATURE_PAE      BIT(6)
+#define CPUID_FEATURE_PSE36    BIT(17)
+#define CPUID_FEAURE_HTT       BIT(28)
+
 /*
  * Constructor for a conventional segment GDT (or LDT) entry
  * This is a macro so it can be used in initialisers
@@ -388,6 +392,25 @@ static void setup_identity(void)
        }
 }
 
+static uint cpu_cpuid_extended_level(void)
+{
+       return cpuid_eax(0x80000000);
+}
+
+int cpu_phys_address_size(void)
+{
+       if (!has_cpuid())
+               return 32;
+
+       if (cpu_cpuid_extended_level() >= 0x80000008)
+               return cpuid_eax(0x80000008) & 0xff;
+
+       if (cpuid_edx(1) & (CPUID_FEATURE_PAE | CPUID_FEATURE_PSE36))
+               return 36;
+
+       return 32;
+}
+
 /* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */
 static void setup_pci_ram_top(void)
 {
index d8a3d60ae72070cad861a20a07a8f4c64476d4db..39aa0f63c65b75b687abd77125a3556f12a14440 100644 (file)
@@ -127,6 +127,7 @@ int cpu_intel_get_info(struct cpu_info *info, int bclk)
        info->cpu_freq = ((msr.lo >> 8) & 0xff) * bclk * 1000000;
        info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU |
                1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID;
+       info->address_width = cpu_phys_address_size();
 
        return 0;
 }
index 1b4d3971b04311df036b4cfbb4fc7480aa859a60..90a766c3c5733a7e42ff9e5f4b4155d095ab7d88 100644 (file)
@@ -70,3 +70,8 @@ int x86_cpu_reinit_f(void)
 {
        return 0;
 }
+
+int cpu_phys_address_size(void)
+{
+       return CONFIG_CPU_ADDR_BITS;
+}
index 21a05dab7de8f4fa15c33b1ab3afdc89823db757..5b001bbee21aff3b1578bc91e209e8ac9cbbbcd6 100644 (file)
@@ -288,4 +288,13 @@ u32 cpu_get_family_model(void);
  */
 u32 cpu_get_stepping(void);
 
+/**
+ * cpu_phys_address_size() - Get the physical address size in bits
+ *
+ * This is 32 for older CPUs but newer ones may support 36.
+ *
+ * @return address size (typically 32 or 36)
+ */
+int cpu_phys_address_size(void);
+
 #endif