bus: ti-sysc: Fix 1-wire reset quirk

Because of the i2c quirk we have the reset quirks named in a confusing
way. Let's fix the 1-wire quirk accordinlyg. Then let's switch to using
better naming later on.

Fixes: 4e23be473e30 ("bus: ti-sysc: Add support for module specific reset quirks")
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index f702c85..6113fc0 100644 (file)
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -1400,7 +1400,7 @@ static void sysc_init_revision_quirks(struct sysc *ddata)
 }
 
 /* 1-wire needs module's internal clocks enabled for reset */
-static void sysc_clk_enable_quirk_hdq1w(struct sysc *ddata)
+static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata)
 {
        int offset = 0x0c;      /* HDQ_CTRL_STATUS */
        u16 val;
@@ -1488,7 +1488,7 @@ static void sysc_init_module_quirks(struct sysc *ddata)
                return;
 
        if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) {
-               ddata->clk_enable_quirk = sysc_clk_enable_quirk_hdq1w;
+               ddata->clk_disable_quirk = sysc_pre_reset_quirk_hdq1w;
 
                return;
        }