hwmon: (sch5627) Disallow write access if virtual registers are locked
authorArmin Wolf <W_Armin@gmx.de>
Thu, 7 Sep 2023 05:26:36 +0000 (07:26 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 20 Nov 2023 10:59:08 +0000 (11:59 +0100)
[ Upstream commit 7da8a635436029957c5350da3acf51d78ed64071 ]

When the lock bit inside SCH5627_REG_CTRL is set, then the virtual
registers become read-only until the next power cycle.
Disallow write access to those registers in such a case.

Tested on a Fujitsu Esprimo P720.

Fixes: aa9f833dfc12 ("hwmon: (sch5627) Add pwmX_auto_channels_temp support")
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Link: https://lore.kernel.org/r/20230907052639.16491-3-W_Armin@gmx.de
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/hwmon/sch5627.c

index 0eefb8c..bf408e3 100644 (file)
@@ -34,6 +34,7 @@
 #define SCH5627_REG_CTRL               0x40
 
 #define SCH5627_CTRL_START             BIT(0)
+#define SCH5627_CTRL_LOCK              BIT(1)
 #define SCH5627_CTRL_VBAT              BIT(4)
 
 #define SCH5627_NO_TEMPS               8
@@ -231,6 +232,14 @@ static int reg_to_rpm(u16 reg)
 static umode_t sch5627_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr,
                                  int channel)
 {
+       const struct sch5627_data *data = drvdata;
+
+       /* Once the lock bit is set, the virtual registers become read-only
+        * until the next power cycle.
+        */
+       if (data->control & SCH5627_CTRL_LOCK)
+               return 0444;
+
        if (type == hwmon_pwm && attr == hwmon_pwm_auto_channels_temp)
                return 0644;