* gcc.dg/lower-subreg-1.c: Disable on arm*-*-* targets.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@191917 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index aa9ddad..0cd1176 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2012-10-01  Ulrich Weigand  <ulrich.weigand@linaro.org>
+
+       * gcc.dg/lower-subreg-1.c: Disable on arm*-*-* targets.
+
 2012-10-01  Marc Glisse  <marc.glisse@inria.fr>
 
        * gcc.target/i386/vect-rebuild.c: New testcase.

diff --git a/gcc/testsuite/gcc.dg/lower-subreg-1.c b/gcc/testsuite/gcc.dg/lower-subreg-1.c
index 8c7cc2c..58d95fe 100644 (file)
--- a/gcc/testsuite/gcc.dg/lower-subreg-1.c
+++ b/gcc/testsuite/gcc.dg/lower-subreg-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { ! { mips64 || { arm-*-* ia64-*-* spu-*-* tilegx-*-* } } } } } */
+/* { dg-do compile { target { ! { mips64 || { arm*-*-* ia64-*-* spu-*-* tilegx-*-* } } } } } */
 /* { dg-options "-O -fdump-rtl-subreg1" } */
 /* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } { "*" } { "" } } */
 /* { dg-require-effective-target ilp32 } */