net: hns3: Fix cmdq registers initialization issue for vf

[ Upstream commit 37dc9cdbdc1bd64bd3b6ea285a9c2e811404dc82 ]

According to hardware's description, the head pointer register should
be written before the tail pointer register while initializing the vf
command queue. Otherwise, it may trigger an interrupt even though there
is no command received.

Fixes: fedd0c15d288 ("net: hns3: Add HNS3 VF IMP(Integrated Management Proc) cmd interface")
Signed-off-by: Jian Shen <shenjian15@huawei.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.c
index fb471fe..d8c0cc8 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.c
@@ -132,8 +132,8 @@ static int hclgevf_init_cmd_queue(struct hclgevf_dev *hdev,
                reg_val |= HCLGEVF_NIC_CMQ_ENABLE;
                hclgevf_write_dev(hw, HCLGEVF_NIC_CSQ_DEPTH_REG, reg_val);
 
-               hclgevf_write_dev(hw, HCLGEVF_NIC_CSQ_TAIL_REG, 0);
                hclgevf_write_dev(hw, HCLGEVF_NIC_CSQ_HEAD_REG, 0);
+               hclgevf_write_dev(hw, HCLGEVF_NIC_CSQ_TAIL_REG, 0);
                break;
        case HCLGEVF_TYPE_CRQ:
                reg_val = (u32)ring->desc_dma_addr;
@@ -145,8 +145,8 @@ static int hclgevf_init_cmd_queue(struct hclgevf_dev *hdev,
                reg_val |= HCLGEVF_NIC_CMQ_ENABLE;
                hclgevf_write_dev(hw, HCLGEVF_NIC_CRQ_DEPTH_REG, reg_val);
 
-               hclgevf_write_dev(hw, HCLGEVF_NIC_CRQ_TAIL_REG, 0);
                hclgevf_write_dev(hw, HCLGEVF_NIC_CRQ_HEAD_REG, 0);
+               hclgevf_write_dev(hw, HCLGEVF_NIC_CRQ_TAIL_REG, 0);
                break;
        }