OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
NULL);
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
NULL);
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
omap2xxx_check_revision();
omap2xxx_prm_init();
omap2xxx_cm_init();
OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
NULL);
+ /* XXX: remove these two once OMAP3 is DT only */
omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
-
- /* XXX: remove this once OMAP3 is DT only */
omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
omap3xxx_check_revision();
omap3xxx_check_features();
OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
NULL);
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
omap3xxx_check_revision();
ti81xx_check_features();
am33xx_prm_init();
OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
NULL);
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
omap3xxx_check_revision();
ti81xx_check_features();
am33xx_prm_init();
AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
NULL);
- omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
omap3xxx_check_revision();
am33xx_check_features();
am33xx_prm_init();
AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
NULL);
- omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
omap3xxx_check_revision();
am33xx_check_features();
omap44xx_prm_init();
OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
omap4xxx_check_revision();
omap4xxx_check_features();
OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
omap44xx_prm_init();
omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
OMAP2_L4_IO_ADDRESS(DRA7XX_CTRL_BASE));
- omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
omap4_pm_init_early();
omap44xx_prm_init();
extern u16 prm_features;
extern void omap2_set_globals_prm(void __iomem *prm);
int omap_prcm_init(void);
+int omap2_prm_base_init(void);
void omap3_prcm_legacy_iomaps_init(void);
# endif
int __init omap2xxx_prm_init(void)
{
+ omap2_prm_base_init();
return prm_register(&omap2xxx_prm_ll_data);
}
int __init am33xx_prm_init(void)
{
+ omap2_prm_base_init();
return prm_register(&am33xx_prm_ll_data);
}
#include "prm-regbits-34xx.h"
#include "cm3xxx.h"
#include "cm-regbits-34xx.h"
+#include "clock.h"
static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
static void omap3xxx_prm_ocp_barrier(void);
int __init omap3xxx_prm_init(void)
{
+ omap2_clk_legacy_provider_init(TI_CLKM_PRM,
+ prm_base + OMAP3430_IVA2_MOD);
+ omap2_prm_base_init();
+
if (omap3_has_io_wakeup())
prm_features |= PRM_HAS_IO_WAKEUP;
int __init omap44xx_prm_init(void)
{
+ omap2_prm_base_init();
omap_prm_base_init();
if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx())
.index = TI_CLKM_PRM,
};
+static struct omap_prcm_init_data omap3_prm_data = {
+ .index = TI_CLKM_PRM,
+
+ /*
+ * IVA2 offset is a negative value, must offset the prm_base
+ * address by this to get it to positive
+ */
+ .offset = -OMAP3430_IVA2_MOD,
+};
+
static struct omap_prcm_init_data scrm_data = {
.index = TI_CLKM_SCRM,
};
{ .compatible = "ti,dm814-prcm", .data = &prm_data },
{ .compatible = "ti,dm816-prcm", .data = &prm_data },
{ .compatible = "ti,omap2-prcm", .data = &prm_data },
- { .compatible = "ti,omap3-prm", .data = &prm_data },
+ { .compatible = "ti,omap3-prm", .data = &omap3_prm_data },
{ .compatible = "ti,omap4-prm", .data = &prm_data },
{ .compatible = "ti,omap4-scrm", .data = &scrm_data },
{ .compatible = "ti,omap5-prm", .data = &prm_data },
};
/**
+ * omap2_prm_base_init - initialize iomappings for the PRM driver
+ *
+ * Detects and initializes the iomappings for the PRM driver, based
+ * on the DT data. Returns 0 in success, negative error value
+ * otherwise.
+ */
+int __init omap2_prm_base_init(void)
+{
+ struct device_node *np;
+ const struct of_device_id *match;
+ struct omap_prcm_init_data *data;
+ void __iomem *mem;
+
+ for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
+ data = (struct omap_prcm_init_data *)match->data;
+
+ mem = of_iomap(np, 0);
+ if (!mem)
+ return -ENOMEM;
+
+ if (data->index == TI_CLKM_PRM)
+ prm_base = mem + data->offset;
+
+ data->mem = mem;
+ }
+
+ return 0;
+}
+
+/**
* omap_prcm_init - low level init for the PRCM drivers
*
* Initializes the low level clock infrastructure for PRCM drivers.
int __init omap_prcm_init(void)
{
struct device_node *np;
- void __iomem *mem;
const struct of_device_id *match;
const struct omap_prcm_init_data *data;
int ret;
for_each_matching_node_and_match(np, omap_prcm_dt_match_table, &match) {
data = match->data;
- mem = of_iomap(np, 0);
- if (!mem)
- return -ENOMEM;
-
- ret = omap2_clk_provider_init(np, data->index, mem);
+ ret = omap2_clk_provider_init(np, data->index, data->mem);
if (ret)
return ret;
}
void __init omap3_prcm_legacy_iomaps_init(void)
{
- omap2_clk_legacy_provider_init(TI_CLKM_PRM,
- prm_base + OMAP3430_IVA2_MOD);
omap2_clk_legacy_provider_init(TI_CLKM_SCRM, omap_ctrl_base_get());
}