--- /dev/null
+/*
+ * arch/arm64/boot/dts/amlogic/g12a_skt.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesong12a.dtsi"
+#include "partition_mbox_normal.dtsi"
+#include "mesong12a_skt-panel.dtsi"
+#include "mesong12a-dvalin.dtsi"
+#include "mesong12a_drm.dtsi"
+
+/ {
+ model = "Amlogic";
+ compatible = "amlogic, g12a";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart_AO;
+ serial1 = &uart_A;
+ serial2 = &uart_B;
+ serial3 = &uart_C;
+ serial4 = &uart_AO_B;
+ tsensor0 = &p_tsensor;
+ tsensor1 = &d_tsensor;
+ };
+
+ memory@00000000 {
+ device_type = "memory";
+ linux,usable-memory = <0x0 0x100000 0x0 0x7ff00000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ /* global autoconfigured region for contiguous allocations */
+ secmon_reserved:linux,secmon {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x400000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+ };
+
+ secos_reserved:linux,secos {
+ status = "disable";
+ compatible = "amlogic, aml_secos_memory";
+ reg = <0x0 0x05300000 0x0 0x2000000>;
+ no-map;
+ };
+ logo_reserved:linux,meson-fb {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
+ };
+ ion_cma_reserved:linux,ion-dev {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x8000000>;
+ alignment = <0x0 0x400000>;
+ };
+ //di_reserved:linux,di {
+ //compatible = "amlogic, di-mem";
+ /* buffer_size = 3621952(yuv422 8bit) */
+ /* 4179008(yuv422 10bit full pack mode) */
+ /** 10x3621952=34.6M(0x23) support 8bit **/
+ /** 10x4736064=45.2M(0x2e) support 12bit **/
+ /** 10x4179008=40M(0x28) support 10bit **/
+ //size = <0x0 0x2800000>;
+ //no-map;
+ //};
+ /*di CMA pool */
+ di_cma_reserved:linux,di_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* buffer_size = 3621952(yuv422 8bit)
+ * | 4736064(yuv422 10bit)
+ * | 4074560(yuv422 10bit full pack mode)
+ * 10x3621952=34.6M(0x23) support 8bit
+ * 10x4736064=45.2M(0x2e) support 12bit
+ * 10x4074560=40M(0x28) support 10bit
+ */
+ size = <0x0 0x02800000>;
+ alignment = <0x0 0x400000>;
+ };
+ /* POST PROCESS MANAGER */
+ ppmgr_reserved:linux,ppmgr {
+ compatible = "shared-dma-pool";
+ size = <0x0 0x0>;
+ };
+
+ codec_mm_cma:linux,codec_mm_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* ion_codec_mm max can alloc size 80M*/
+ size = <0x0 0x13400000>;
+ alignment = <0x0 0x400000>;
+ linux,contiguous-region;
+ };
+ /* codec shared reserved */
+ codec_mm_reserved:linux,codec_mm_reserved {
+ compatible = "amlogic, codec-mm-reserved";
+ size = <0x0 0x0>;
+ alignment = <0x0 0x100000>;
+ //no-map;
+ };
+ /* vdin0 CMA pool */
+ vdin0_cma_reserved:linux,vdin0_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16+4 M */
+ size = <0x0 0x04000000>;
+ alignment = <0x0 0x400000>;
+ };
+ /* vdin1 CMA pool */
+ vdin1_cma_reserved:linux,vdin1_cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ /* 1920x1080x2x4 =16 M */
+ size = <0x0 0x04000000>;
+ alignment = <0x0 0x400000>;
+ };
+ };
+
+ meson-irblaster {
+ compatible = "amlogic, meson_irblaster";
+ dev_name = "meson-irblaster";
+ reg = <0x0 0xff80014c 0x0 0x10>,
+ <0x0 0xff800040 0x0 0x4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&irblaster_pins>;
+ status = "okay";
+ };
+
+ vout {
+ compatible = "amlogic, vout";
+ dev_name = "vout";
+ status = "okay";
+ };
+
+ vout2 {
+ compatible = "amlogic, vout2";
+ dev_name = "vout";
+ status = "okay";
+ };
+/*external_phy please use this
+ ethmac: ethernet@ff3f0000 {
+ compatible = "amlogic, g12a-eth-dwmac", "snps,dwmac";
+ reg = <0x0 0xff3f0000 0x0 0x10000
+ 0x0 0xff634540 0x0 0x8
+ 0x0 0xff64c000 0x0 0xa0>;
+ reg-names = "eth_base", "eth_cfg", "eth_pll";
+ interrupts = <0 8 1>;
+ interrupt-names = "macirq";
+ status = "okay";
+ clocks = <&clkc CLKID_ETH_CORE>;
+ clock-names = "ethclk81";
+
+ pinctrl-names = "external_eth_pins";
+ pinctrl-0 = <&external_eth_pins>;
+ mc_val = <0x1621>;
+
+ internal_phy=<0>;
+ };
+
+*/
+ ethmac: ethernet@ff3f0000 {
+ compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
+ reg = <0x0 0xff3f0000 0x0 0x10000
+ 0x0 0xff634540 0x0 0x8
+ 0x0 0xff64c000 0x0 0xa0>;
+ reg-names = "eth_base", "eth_cfg", "eth_pll";
+ interrupts = <0 8 1>;
+ interrupt-names = "macirq";
+ status = "okay";
+ clocks = <&clkc CLKID_ETH_CORE>;
+ clock-names = "ethclk81";
+
+ pinctrl-names = "internal_eth_pins";
+ pinctrl-0 = <&internal_eth_pins>;
+ mc_val = <0x4be04>;
+
+ internal_phy=<1>;
+ };
+
+ amhdmitx: amhdmitx{
+ compatible = "amlogic, amhdmitx";
+ dev_name = "amhdmitx";
+ status = "okay";
+ vend-data = <&vend_data>;
+ pinctrl-names="default", "hdmitx_i2c";
+ pinctrl-0=<&hdmitx_hpd &hdmitx_ddc>;
+ pinctrl-1=<&hdmitx_hpd_gpio &i2c3_master_pins1>;
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_VPU_MUX>;
+ clock-names = "hdmi_vapb_clk",
+ "hdmi_vpu_clk";
+ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+ interrupts = <0 57 1>;
+ interrupt-names = "hdmitx_hpd";
+ /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+ * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+ * 10:G12A
+ */
+ ic_type = <10>;
+ vend_data: vend_data{ /* Should modified by Customer */
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* standards.ieee.org/develop/regauth/oui/oui.txt */
+ vendor_id = <0x000000>;
+ };
+ };
+
+ vdac {
+ compatible = "amlogic, vdac";
+ dev_name = "vdac";
+ status = "okay";
+ };
+
+ cvbsout {
+ compatible = "amlogic, cvbsout-g12a";
+ dev_name = "cvbsout";
+ status = "okay";
+
+ /* performance: reg_address, reg_value */
+ /* s905x */
+ performance = <0x1bf0 0x9
+ 0x1b56 0x343
+ 0x1b12 0x8080
+ 0x1b05 0xfd
+ 0x1c59 0xf752
+ 0xffff 0x0>; /* ending flag */
+ };
+
+ bt-dev{
+ compatible = "amlogic, bt-dev";
+ dev_name = "bt-dev";
+ status = "okay";
+ gpio_reset = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ gpio_hostwake = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
+ };
+
+ wifi{
+ compatible = "amlogic, aml_wifi";
+ dev_name = "aml_wifi";
+ status = "okay";
+ interrupt_pin = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ irq_trigger_type = "GPIO_IRQ_LOW";
+ power_on_pin = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>;
+ dhd_static_buf; //if use bcm wifi, config dhd_static_buf
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_e_pins>;
+ pwm_config = <&wifi_pwm_conf>;
+ };
+
+ wifi_pwm_conf:wifi_pwm_conf{
+ pwm_channel1_conf {
+ pwms = <&pwm_ef MESON_PWM_0 30040 0>;
+ duty-cycle = <15020>;
+ times = <10>;
+ };
+ pwm_channel2_conf {
+ pwms = <&pwm_ef MESON_PWM_2 30030 0>;
+ duty-cycle = <15015>;
+ times = <12>;
+ };
+ };
+
+ pcie_A: pcieA@fc000000 {
+ compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
+ reg = <0x0 0xfc000000 0x0 0x400000
+ 0x0 0xff648000 0x0 0x2000
+ 0x0 0xfc400000 0x0 0x200000
+ 0x0 0xff646000 0x0 0x2000
+ 0x0 0xffd01080 0x0 0x10>;
+ reg-names = "elbi", "cfg", "config", "phy", "reset";
+ reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
+ interrupts = <0 221 0>, <0 223 0>;
+ #interrupt-cells = <1>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0 0xfc600000 0x0 0x100000
+ /* downstream I/O */
+ 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
+ /* non-prefetchable memory */
+ num-lanes = <1>;
+ pcie-num = <1>;
+
+ clocks = <&clkc CLKID_PCIE_PLL
+ &clkc CLKID_PCIE_COMB
+ &clkc CLKID_PCIE_PHY>;
+ clock-names = "pcie_refpll",
+ "pcie",
+ "pcie_phy";
+ /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
+ gpio-type = <2>;
+ pcie-apb-rst-bit = <15>;
+ pcie-phy-rst-bit = <14>;
+ pcie-ctrl-a-rst-bit = <12>;
+ status = "okay";
+ };
+
+ sd_emmc_c: emmc@ffe07000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe07000 0x0 0x800>;
+ interrupts = <0 191 1>;
+ pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+ pinctrl-0 = <&emmc_clk_cmd_pins>;
+ pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <8>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ /* mmc-ddr-1_8v; */
+ /* mmc-hs200-1_8v; */
+
+ max-frequency = <200000000>;
+ non-removable;
+ disable-wp;
+ emmc {
+ pinname = "emmc";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_8_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ /* "MMC_CAP_1_8V_DDR", */
+ "MMC_CAP_HW_RESET",
+ "MMC_CAP_ERASE",
+ "MMC_CAP_CMD23";
+ /* caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
+ f_min = <400000>;
+ f_max = <200000000>;
+ tx_delay = <0>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+ hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+ card_type = <1>;
+ /* 1:mmc card(include eMMC),
+ * 2:sd card(include tSD)
+ */
+ };
+ };
+
+ sd_emmc_b:sd@ffe05000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe05000 0x0 0x800>;
+ interrupts = <0 190 1>;
+
+ pinctrl-names = "sd_all_pins",
+ "sd_clk_cmd_pins";
+ pinctrl-0 = <&sd_all_pins>;
+ pinctrl-1 = <&sd_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_B>,
+ <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sd {
+ pinname = "sd";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50";
+ f_min = <400000>;
+ f_max = <200000000>;
+ max_req_size = <0x20000>; /**128KB*/
+ gpio_dat3 = <&gpio GPIOC_4 GPIO_ACTIVE_HIGH>;
+ jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ gpio_cd = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>;
+ card_type = <5>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ };
+ };
+ sd_emmc_a:sdio@ffe03000 {
+ status = "okay";
+ compatible = "amlogic, meson-mmc-g12a";
+ reg = <0x0 0xffe03000 0x0 0x800>;
+ interrupts = <0 189 4>;
+
+ pinctrl-names = "sdio_all_pins",
+ "sdio_clk_cmd_pins";
+ pinctrl-0 = <&sdio_all_pins>;
+ pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+ clocks = <&clkc CLKID_SD_EMMC_A>,
+ <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+ <&clkc CLKID_FCLK_DIV2>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&xtal>;
+ clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <100000000>;
+ disable-wp;
+ sdio {
+ pinname = "sdio";
+ ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+ caps = "MMC_CAP_4_BIT_DATA",
+ "MMC_CAP_MMC_HIGHSPEED",
+ "MMC_CAP_SD_HIGHSPEED",
+ "MMC_CAP_NONREMOVABLE",
+ "MMC_CAP_UHS_SDR12",
+ "MMC_CAP_UHS_SDR25",
+ "MMC_CAP_UHS_SDR50",
+ "MMC_CAP_UHS_SDR104",
+ "MMC_PM_KEEP_POWER",
+ "MMC_CAP_SDIO_IRQ";
+ f_min = <400000>;
+ f_max = <200000000>;
+ /* max_req_size = <0x20000>; */ /**128KB*/
+ max_req_size = <0x400>;
+ card_type = <3>;
+ /* 3:sdio device(ie:sdio-wifi),
+ * 4:SD combo (IO+mem) card
+ */
+ dmode = "pio";
+ };
+ };
+ nand: nfc@0 {
+ compatible = "amlogic, aml_mtd_nand";
+ dev_name = "mtdnand";
+ status = "disabled";
+ reg = <0x0 0xFFE07800 0x0 0x200>;
+ interrupts = <0 34 1>;
+
+ pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+ pinctrl-0 = <&all_nand_pins>;
+ pinctrl-1 = <&all_nand_pins>;
+ pinctrl-2 = <&nand_cs_pins>;
+ clocks = <&clkc CLKID_SD_EMMC_C>,
+ <&clkc CLKID_SD_EMMC_C_P0_COMP>;
+ clock-names = "core", "clkin";
+
+ device_id = <0>;
+ /*fip/tpl configurations, must be same
+ * with uboot if bl_mode was set as 1
+ * bl_mode: 0 compact mode; 1 descrete mode
+ * if bl_mode was set as 1, fip configuration will work
+ */
+ bl_mode = <1>;
+ /*copy count of fip*/
+ fip_copies = <4>;
+ /*size of each fip copy */
+ fip_size = <0x200000>;
+ nand_clk_ctrl = <0xFFE07000>;
+ plat-names = "bootloader","nandnormal";
+ plat-num = <2>;
+ plat-part-0 = <&bootloader>;
+ plat-part-1 = <&nandnormal>;
+ bootloader: bootloader{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <1>;
+ part_num = <0>;
+ rb_detect = <1>;
+ };
+ nandnormal: nandnormal{
+ enable_pad ="ce0";
+ busy_pad = "rb0";
+ timming_mode = "mode5";
+ bch_mode = "bch8_1k";
+ plane_mode = "twoplane";
+ t_rea = <20>;
+ t_rhoh = <15>;
+ chip_num = <2>;
+ part_num = <3>;
+ partition = <&nand_partitions>;
+ rb_detect = <1>;
+ };
+ nand_partitions:nand_partition{
+ /*
+ * if bl_mode is 1, tpl size was generate by
+ * fip_copies * fip_size which
+ * will not skip bad when calculating
+ * the partition size;
+ *
+ * if bl_mode is 0,
+ * tpl partition must be comment out.
+ */
+ tpl{
+ offset=<0x0 0x0>;
+ size=<0x0 0x0>;
+ };
+ logo{
+ offset=<0x0 0x0>;
+ size=<0x0 0x200000>;
+ };
+ recovery{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ boot{
+ offset=<0x0 0x0>;
+ size=<0x0 0x1000000>;
+ };
+ system{
+ offset=<0x0 0x0>;
+ size=<0x0 0x4000000>;
+ };
+ data{
+ offset=<0xffffffff 0xffffffff>;
+ size=<0x0 0x0>;
+ };
+ };
+ };
+
+ uart_A: serial@ffd24000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd24000 0x0 0x18>;
+ interrupts = <0 26 1>;
+ status = "okay";
+ clocks = <&xtal
+ &clkc CLKID_UART0>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 128 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&a_uart_pins>;
+ };
+
+ uart_B: serial@ffd23000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd23000 0x0 0x18>;
+ interrupts = <0 75 1>;
+ status = "disable";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&b_uart_pins>;
+ };
+
+ uart_C: serial@ffd22000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0xffd22000 0x0 0x18>;
+ interrupts = <0 93 1>;
+ status = "disable";
+ clocks = <&xtal
+ &clkc CLKID_UART1>;
+ clock-names = "clk_uart",
+ "clk_gate";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&c_uart_pins>;
+ };
+
+ aocec: aocec {
+ compatible = "amlogic, aocec-g12a";
+ device_name = "aocec";
+ status = "okay";
+ vendor_name = "Amlogic"; /* Max Chars: 8 */
+ /* Refer to the following URL at:
+ * http://standards.ieee.org/develop/regauth/oui/oui.txt
+ */
+ vendor_id = <0x000000>;
+ product_desc = "G12A"; /* Max Chars: 16 */
+ cec_osd_string = "AML_MBOX"; /* Max Chars: 14 */
+ port_num = <1>;
+ ee_cec;
+ arc_port_mask = <0x2>;
+ interrupts = <0 203 1>;
+ interrupt-names = "hdmi_aocecb";
+ pinctrl-names = "default";
+ pinctrl-0=<&eecec_b>;
+ reg = <0x0 0xFF80023c 0x0 0x4
+ 0x0 0xFF800000 0x0 0x400>;
+ };
+
+ dwc3: dwc3@ff500000 {
+ compatible = "synopsys, dwc3";
+ status = "okay";
+ reg = <0x0 0xff500000 0x0 0x100000>;
+ interrupts = <0 30 4>;
+ usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
+ cpu-type = "gxl";
+ clock-src = "usb3.0";
+ clocks = <&clkc CLKID_USB_GENERAL>;
+ clock-names = "dwc_general";
+ };
+
+ usb2_phy_v2: usb2phy@ffe09000 {
+ compatible = "amlogic, amlogic-new-usb2-v2";
+ status = "okay";
+ portnum = <2>;
+ reg = <0x0 0xffe09000 0x0 0x80
+ 0x0 0xffd01008 0x0 0x4
+ 0x0 0xff636000 0x0 0x2000
+ 0x0 0xff63a000 0x0 0x2000>;
+ };
+
+ usb3_phy_v2: usb3phy@ffe09080 {
+ compatible = "amlogic, amlogic-new-usb3-v2";
+ status = "okay";
+ portnum = <0>;
+ reg = <0x0 0xffe09080 0x0 0x20>;
+ phy-reg = <0xff646000>;
+ phy-reg-size = <0x4>;
+ usb2-phy-reg = <0xffe09000>;
+ usb2-phy-reg-size = <0x80>;
+ interrupts = <0 16 4>;
+ otg = <1>;
+ clocks = <&clkc CLKID_PCIE_PLL>;
+ clock-names = "pcie_refpll";
+ gpio-vbus-power = "GPIOH_6";
+ gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
+ };
+
+ dwc2_a {
+ compatible = "amlogic, dwc2";
+ device_name = "dwc2_a";
+ reg = <0x0 0xff400000 0x0 0x40000>;
+ status = "okay";
+ interrupts = <0 31 4>;
+ pl-periph-id = <0>; /** lm name */
+ clock-src = "usb0"; /** clock src */
+ port-id = <0>; /** ref to mach/usb.h */
+ port-type = <2>; /** 0: otg, 1: host, 2: slave */
+ port-speed = <0>; /** 0: default, high, 1: full */
+ port-config = <0>; /** 0: default */
+ /*0:default,1:single,2:incr,3:incr4,4:incr8,5:incr16,6:disable*/
+ port-dma = <0>;
+ port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+ usb-fifo = <728>;
+ cpu-type = "v2";
+ /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+ controller-type = <3>;
+ phy-reg = <0xffe09000>;
+ phy-reg-size = <0xa0>;
+ /** phy-interface: 0x0: amlogic phy, 0x1: synopsys phy **/
+ phy-interface = <0x0>;
+ clocks = <&clkc CLKID_USB_GENERAL
+ &clkc CLKID_USB1_TO_DDR>;
+ clock-names = "usb_general",
+ "usb1";
+ };
+
+ canvas{
+ compatible = "amlogic, meson, canvas";
+ dev_name = "amlogic-canvas";
+ status = "okay";
+ reg = <0x0 0xff638000 0x0 0x2000>;
+ };
+
+ codec_io {
+ compatible = "amlogic, codec_io";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ io_cbus_base{
+ reg = <0x0 0xffd00000 0x0 0x100000>;
+ };
+ io_dos_base{
+ reg = <0x0 0xff620000 0x0 0x10000>;
+ };
+ io_hiubus_base{
+ reg = <0x0 0xff63c000 0x0 0x2000>;
+ };
+ io_aobus_base{
+ reg = <0x0 0xff800000 0x0 0x10000>;
+ };
+ io_vcbus_base{
+ reg = <0x0 0xff900000 0x0 0x40000>;
+ };
+ io_dmc_base{
+ reg = <0x0 0xff638000 0x0 0x2000>;
+ };
+ };
+
+ codec_mm {
+ compatible = "amlogic, codec, mm";
+ memory-region = <&codec_mm_cma &codec_mm_reserved>;
+ dev_name = "codec_mm";
+ status = "okay";
+ };
+
+ mesonstream {
+ compatible = "amlogic, codec, streambuf";
+ dev_name = "mesonstream";
+ status = "okay";
+ // clocks = <&clkc CLKID_DOS_PARSER
+ // &clkc CLKID_DEMUX
+ // &clkc CLKID_DOS
+ // &clkc CLKID_VDEC_MUX
+ // &clkc CLKID_HCODEC_MUX
+ // &clkc CLKID_HEVC_MUX>;
+ // clock-names = "parser_top",
+ // "demux",
+ // "vdec",
+ // "clk_vdec_mux",
+ // "clk_hcodec_mux",
+ // "clk_hevc_mux";
+ };
+
+ vdec {
+ compatible = "amlogic, vdec";
+ dev_name = "vdec.0";
+ status = "okay";
+ interrupts = <0 3 1
+ 0 23 1
+ 0 32 1
+ 0 43 1
+ 0 44 1
+ 0 45 1>;
+ interrupt-names = "vsync",
+ "demux",
+ "parser",
+ "mailbox_0",
+ "mailbox_1",
+ "mailbox_2";
+ };
+
+ rdma{
+ compatible = "amlogic, meson, rdma";
+ dev_name = "amlogic-rdma";
+ status = "okay";
+ interrupts = <0 89 1>;
+ interrupt-names = "rdma";
+ };
+
+ ge2d {
+ compatible = "amlogic, ge2d-g12a";
+ dev_name = "ge2d";
+ status = "okay";
+ interrupts = <0 146 1>;
+ interrupt-names = "ge2d";
+ clocks = <&clkc CLKID_VAPB_MUX>,
+ <&clkc CLKID_GE2D_GATE>,
+ <&clkc CLKID_G2D>;
+ clock-names = "clk_vapb_0",
+ "clk_ge2d",
+ "clk_ge2d_gate";
+ reg = <0x0 0xff940000 0x0 0x10000>;
+ };
+
+ ppmgr {
+ compatible = "amlogic, ppmgr";
+ memory-region = <&ppmgr_reserved>;
+ dev_name = "ppmgr";
+ status = "okay";
+ };
+
+ deinterlace {
+ compatible = "amlogic, deinterlace";
+ status = "okay";
+ /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+ flag_cma = <1>;
+ //memory-region = <&di_reserved>;
+ memory-region = <&di_cma_reserved>;
+ interrupts = <0 46 1
+ 0 40 1>;
+ interrupt-names = "pre_irq", "post_irq";
+ clocks = <&clkc CLKID_VPU_MUX>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+ <&clkc CLKID_VPU_CLKB_COMP>;
+ clock-names = "vpu_mux",
+ "fclk_div4",
+ "vpu_clkb_tmp_composite",
+ "vpu_clkb_composite";
+ clock-range = <333 666>;
+ /* buffer-size = <3621952>;(yuv422 8bit) */
+ buffer-size = <4074560>;/*yuv422 fullpack*/
+ /* reserve-iomap = "true"; */
+ /* if enable nr10bit, set nr10bit-support to 1 */
+ post-wr-support = <1>;
+ nr10bit-support = <1>;
+ nrds-enable = <1>;
+ pps-enable = <1>;
+ };
+ ionvideo {
+ compatible = "amlogic, ionvideo";
+ dev_name = "ionvideo";
+ status = "okay";
+ };
+ /*if you want to use vdin just modify status to "ok"*/
+ vdin0 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin0_cma_reserved>;
+ dev_name = "vdin0";
+ status = "okay";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;2:cma alone*/
+ /*MByte, if 10bit disable: 64M(YUV422),
+ *if 10bit enable: 64*1.5 = 96M(YUV422)
+ *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+ *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+ *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+ *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+ */
+ /*cma_size = <16>;*/
+ interrupts = <0 83 1>;
+ rdma-irq = <2>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <0>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ *bit4:support yuv422 10bit full pack mode (from txl new add)
+ */
+ tv_bit_mode = <0x15>;
+ };
+ vdin1 {
+ compatible = "amlogic, vdin";
+ memory-region = <&vdin1_cma_reserved>;
+ dev_name = "vdin1";
+ status = "okay";
+ reserve-iomap = "true";
+ flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+ interrupts = <0 85 1>;
+ rdma-irq = <4>;
+ /*clocks = <&clock CLK_FPLL_DIV5>,
+ * <&clock CLK_VDIN_MEAS_CLK>;
+ *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+ */
+ vdin_id = <1>;
+ /*vdin write mem color depth support:
+ *bit0:support 8bit
+ *bit1:support 9bit
+ *bit2:support 10bit
+ *bit3:support 12bit
+ */
+ tv_bit_mode = <1>;
+ };
+
+ unifykey{
+ compatible = "amlogic, unifykey";
+ status = "ok";
+
+ unifykey-num = <14>;
+ unifykey-index-0 = <&keysn_0>;
+ unifykey-index-1 = <&keysn_1>;
+ unifykey-index-2 = <&keysn_2>;
+ unifykey-index-3 = <&keysn_3>;
+ unifykey-index-4 = <&keysn_4>;
+ unifykey-index-5 = <&keysn_5>;
+ unifykey-index-6 = <&keysn_6>;
+ unifykey-index-7 = <&keysn_7>;
+ unifykey-index-8 = <&keysn_8>;
+ unifykey-index-9 = <&keysn_9>;
+ unifykey-index-10= <&keysn_10>;
+ unifykey-index-11= <&keysn_11>;
+ unifykey-index-12= <&keysn_12>;
+ unifykey-index-13= <&keysn_13>;
+
+ keysn_0: key_0{
+ key-name = "usid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_1:key_1{
+ key-name = "mac";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_2:key_2{
+ key-name = "hdcp";
+ key-device = "secure";
+ key-type = "sha1";
+ key-permit = "read","write","del";
+ };
+ keysn_3:key_3{
+ key-name = "secure_boot_set";
+ key-device = "efuse";
+ key-permit = "write";
+ };
+ keysn_4:key_4{
+ key-name = "mac_bt";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_5:key_5{
+ key-name = "mac_wifi";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ key-type = "mac";
+ };
+ keysn_6:key_6{
+ key-name = "hdcp2_tx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_7:key_7{
+ key-name = "hdcp2_rx";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_8:key_8{
+ key-name = "widevinekeybox";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_9:key_9{
+ key-name = "deviceid";
+ key-device = "normal";
+ key-permit = "read","write","del";
+ };
+ keysn_10:key_10{
+ key-name = "hdcp22_fw_private";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_11:key_11{
+ key-name = "PlayReadykeybox25";
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_12:key_12{
+ key-name = "prpubkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ keysn_13:key_13{
+ key-name = "prprivkeybox";// PlayReady
+ key-device = "secure";
+ key-permit = "read","write","del";
+ };
+ };//End unifykey
+
+ amlvecm {
+ compatible = "amlogic, vecm";
+ dev_name = "aml_vecm";
+ status = "okay";
+ gamma_en = <0>;/*1:enabel ;0:disable*/
+ wb_en = <0>;/*1:enabel ;0:disable*/
+ cm_en = <0>;/*1:enabel ;0:disable*/
+ };
+
+ meson-amvideom {
+ compatible = "amlogic, amvideom";
+ dev_name = "amvideom";
+ status = "okay";
+ interrupts = <0 3 1>;
+ interrupt-names = "vsync";
+ };
+
+ meson-fb {
+ compatible = "amlogic, meson-g12a";
+ memory-region = <&logo_reserved>;
+ dev_name = "meson-fb";
+ status = "disable";
+ interrupts = <0 3 1
+ 0 89 1>;
+ interrupt-names = "viu-vsync", "rdma";
+ mem_size = <0x00800000 0x1980000 0x100000 0x100000>;
+ /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+ display_mode_default = "1080p60hz";
+ scale_mode = <1>;
+ /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+ display_size_default = <1920 1080 1920 2160 32>;
+ /*1920*1080*4*3 = 0x17BB000*/
+ pxp_mode = <1>; /** 0:normal mode 1:pxp mode */
+ mem_alloc = <1>;
+ logo_addr = "0x3f800000";
+ };
+
+ /* Audio Related start */
+ /* Sound iomap */
+ aml_snd_iomap {
+ compatible = "amlogic, snd-iomap";
+ status = "okay";
+ #address-cells=<2>;
+ #size-cells=<2>;
+ ranges;
+ pdm_bus {
+ reg = <0x0 0xFF640000 0x0 0x2000>;
+ };
+ audiobus_base {
+ reg = <0x0 0xFF642000 0x0 0x2000>;
+ };
+ audiolocker_base {
+ reg = <0x0 0xFF64A000 0x0 0x2000>;
+ };
+ eqdrc_base {
+ reg = <0x0 0xFF642800 0x0 0x1800>;
+ };
+ reset_base {
+ reg = <0x0 0xFFD01000 0x0 0x1000>;
+ };
+ };
+ pdm_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, pdm_dummy_codec";
+ status = "okay";
+ };
+ dummy_codec:dummy{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_dummy_codec";
+ status = "okay";
+ };
+ amlogic_codec:t9015{
+ #sound-dai-cells = <0>;
+ compatible = "amlogic, aml_codec_T9015";
+ reg = <0x0 0xFF632000 0x0 0x2000>;
+ is_auge_used = <1>; /* meson or auge chipset used */
+ tdmout_index = <1>;
+ status = "okay";
+ };
+ auge_sound {
+ compatible = "amlogic, g12a-sound-card";
+ aml-audio-card,name = "AML-AUGESOUND";
+
+ aml-audio-card,aux-devs = <&amlogic_codec>;
+ /*avout mute gpio*/
+ avout_mute-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+
+ aml-audio-card,dai-link@0 {
+ format = "dsp_a";
+ mclk-fs = <512>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ //bitclock-master = <&tdmacodec>;
+ //frame-master = <&tdmacodec>;
+ tdmacpu: cpu {
+ sound-dai = <&aml_tdma>;
+ dai-tdm-slot-tx-mask =
+ <1 1 1 1 1 1 1 1>;
+ dai-tdm-slot-rx-mask =
+ <1 1 1 1 1 1 1 1>;
+ dai-tdm-slot-num = <8>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <24576000>;
+ };
+ tdmacodec: codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@1 {
+ format = "i2s"; /*"dsp_a";*/
+ mclk-fs = <256>;
+ //continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ bitclock-master = <&aml_tdmb>;
+ frame-master = <&aml_tdmb>;
+ cpu {
+ sound-dai = <&aml_tdmb>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ /*
+ * dai-tdm-slot-tx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-rx-mask =
+ * <1 1 1 1 1 1 1 1>;
+ * dai-tdm-slot-num = <8>;
+ */
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec &amlogic_codec
+ /*&ad82584f_62*/>;
+ };
+ };
+
+ aml-audio-card,dai-link@2 {
+ format = "i2s";
+ mclk-fs = <256>;
+ continuous-clock;
+ //bitclock-inversion;
+ //frame-inversion;
+ bitclock-master = <&aml_tdmc>;
+ frame-master = <&aml_tdmc>;
+ cpu {
+ sound-dai = <&aml_tdmc>;
+ dai-tdm-slot-tx-mask = <1 1>;
+ dai-tdm-slot-rx-mask = <1 1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ system-clock-frequency = <12288000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec &dummy_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@3 {
+ mclk-fs = <64>;
+ cpu {
+ sound-dai = <&aml_pdm>;
+ };
+ codec {
+ sound-dai = <&pdm_codec>;
+ };
+ };
+
+ aml-audio-card,dai-link@4 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&aml_spdif>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ aml-audio-card,dai-link@5 {
+ mclk-fs = <128>;
+ cpu {
+ sound-dai = <&aml_spdif_b>;
+ system-clock-frequency = <6144000>;
+ };
+ codec {
+ sound-dai = <&dummy_codec>;
+ };
+ };
+ };
+ audiolocker: locker {
+ compatible = "amlogic, audiolocker";
+ clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT
+ &clkaudio CLKID_AUDIO_LOCKER_IN
+ &clkaudio CLKID_AUDIO_MCLK_D
+ &clkaudio CLKID_AUDIO_MCLK_E
+ &clkc CLKID_MPLL1
+ &clkc CLKID_MPLL2>;
+ clock-names = "lock_out", "lock_in", "out_src",
+ "in_src", "out_calc", "in_ref";
+ interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "irq";
+ frequency = <49000000>; /* pll */
+ dividor = <49>; /* locker's parent */
+ status = "disabled";
+ };
+ /* Audio Related end */
+
+ cpu_opp_table0: cpu_opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <731000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <731000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <731000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <667000000>;
+ opp-microvolt = <731000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <731000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <731000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1398000000>;
+ opp-microvolt = <761000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <791000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <1608000000>;
+ opp-microvolt = <831000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <1896000000>;
+ opp-microvolt = <981000>;
+ };
+ };
+
+ cpufreq-meson {
+ compatible = "amlogic, cpufreq-meson";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_ao_d_pins3>;
+ status = "okay";
+ };
+
+ vddcpu0: pwmao_d-regulator {
+ compatible = "pwm-regulator";
+ pwms = <&pwm_AO_cd MESON_PWM_1 1210 0>;
+ regulator-name = "vddcpu0";
+ regulator-min-microvolt = <731000>;
+ regulator-max-microvolt = <1011000>;
+ regulator-always-on;
+ max-duty-cycle = <1210>;
+ /* Voltage Duty-Cycle */
+ voltage-table = <1011000 0>,
+ <1001000 6>,
+ <991000 9>,
+ <981000 12>,
+ <971000 16>,
+ <961000 19>,
+ <951000 23>,
+ <941000 26>,
+ <931000 29>,
+ <921000 33>,
+ <911000 36>,
+ <901000 39>,
+ <891000 43>,
+ <881000 46>,
+ <871000 50>,
+ <861000 53>,
+ <851000 56>,
+ <841000 60>,
+ <831000 63>,
+ <821000 67>,
+ <811000 70>,
+ <801000 73>,
+ <791000 77>,
+ <781000 80>,
+ <771000 84>,
+ <761000 87>,
+ <751000 90>,
+ <741000 94>,
+ <731000 100>;
+
+ status = "okay";
+ };
+
+ meson_cooldev: meson-cooldev@0 {
+ status = "okay";
+ compatible = "amlogic, meson-cooldev";
+ device_name = "mcooldev";
+ cooling_devices {
+ cpucore_cool_cluster0 {
+ min_state = <1>;
+ dyn_coeff = <0>;
+ cluster_id = <0>;
+ node_name = "cpucore_cool0";
+ device_type = "cpucore";
+ };
+ };
+ cpucore_cool0:cpucore_cool0 {
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ };
+ /*meson cooling devices end*/
+
+ thermal-zones {
+ soc_thermal: soc_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1050>;
+ thermal-sensors = <&p_tsensor 0>;
+ trips {
+ switch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ control: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ hot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <3000>;
+ type = "hot";
+ };
+ critical: trip-point@3 {
+ temperature = <150000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ ddr_thermal: ddr_thermal {
+ polling-delay = <1000>;
+ polling-delay-passive = <100>;
+ sustainable-power = <1050>;
+ thermal-sensors = <&d_tsensor 1>;
+ trips {
+ dswitch_on: trip-point@0 {
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ dcontrol: trip-point@1 {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ dhot: trip-point@2 {
+ temperature = <85000>;
+ hysteresis = <3000>;
+ type = "hot";
+ };
+ dcritical: trip-point@3 {
+ temperature = <150000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ };
+ };
+ /*thermal zone end*/
+}; /* end of / */
+
+&pwm_AO_cd {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c0_master_pins2>;
+ clock-frequency = <400000>;
+
+ gt9xx@5d {
+ compatible = "goodix,gt9xx";
+ status = "okay";
+ reg = <0x5d>;
+ reset-gpio = <&gpio GPIOZ_9 0x00>;
+ irq-gpio = <&gpio GPIOZ_3 0x00>;
+ };
+
+ ftxx@38 {
+ compatible = "focaltech,fts";
+ status = "okay";
+ reg = <0x38>;
+ reset-gpio = <&gpio GPIOZ_9 0x00>;
+ irq-gpio = <&gpio GPIOZ_3 0x00>;
+ x_max = <600>;
+ y_max = <1024>;
+ max-touch-number = <10>;
+ };
+};
+
+&i2c3 {
+ status = "okay";
+ pinctrl-names="default";
+ pinctrl-0=<&i2c3_master_pins2>;
+ clock-frequency = <100000>; /* default 100k */
+
+ /* for ref board */
+ ad82584f_62: ad82584f_62@62 {
+ compatible = "ESMT, ad82584f";
+ #sound-dai-cells = <0>;
+ reg = <0x31>;
+ status = "okay";
+ reset_pin = <&gpio GPIOA_5 0>;
+ };
+
+ tas5707_36: tas5707_36@36 {
+ compatible = "ti,tas5707";
+ #sound-dai-cells = <0>;
+ reg = <0x1b>;
+ status = "disabled";
+ reset_pin = <&gpio GPIOA_5 0>;
+ };
+
+};
+
+&audiobus {
+ aml_tdma: tdma {
+ compatible = "amlogic, g12a-snd-tdma";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <1 0>;
+ dai-tdm-lane-slot-mask-out = <0 1>;
+ dai-tdm-clk-sel = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+ &clkc CLKID_MPLL0>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmout_a &tdmin_a>;
+ };
+
+ aml_tdmb: tdmb {
+ compatible = "amlogic, g12a-snd-tdmb";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <0 1 0 0>;
+ dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <1>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+ &clkc CLKID_MPLL1>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmb_mclk &tdmout_b &tdmin_b>;
+ };
+
+ aml_tdmc: tdmc {
+ compatible = "amlogic, g12a-snd-tdmc";
+ #sound-dai-cells = <0>;
+ dai-tdm-lane-slot-mask-in = <0 1 0 0>;
+ #dai-tdm-lane-slot-mask-out = <1 0 1 1>;
+ #dai-tdm-lane-oe-slot-mask-in = <0 0 0 0>;
+ dai-tdm-lane-oe-slot-mask-out = <1 0 0 0>;
+ dai-tdm-clk-sel = <2>;
+ clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+ &clkc CLKID_MPLL2>;
+ clock-names = "mclk", "clk_srcpll";
+ pinctrl-names = "tdm_pins";
+ pinctrl-0 = <&tdmc_mclk &tdmout_c &tdmin_c>;
+ };
+
+ aml_spdif: spdif {
+ compatible = "amlogic, g12a-snd-spdif-a";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc CLKID_MPLL0
+ &clkc CLKID_FCLK_DIV4
+ &clkaudio CLKID_AUDIO_SPDIFIN
+ &clkaudio CLKID_AUDIO_SPDIFOUT
+ &clkaudio CLKID_AUDIO_SPDIFIN_CTRL
+ &clkaudio CLKID_AUDIO_SPDIFOUT_CTRL>;
+ clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+ "gate_spdifout", "clk_spdifin", "clk_spdifout";
+ interrupts =
+ <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "irq_spdifin";
+ pinctrl-names = "spdif_pins";
+ pinctrl-0 = <&spdifout &spdifin>;
+ status = "okay";
+ };
+ aml_spdif_b: spdif_b {
+ compatible = "amlogic, g12a-snd-spdif-b";
+ #sound-dai-cells = <0>;
+ clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+ &clkaudio CLKID_AUDIO_SPDIFOUTB
+ &clkaudio CLKID_AUDIO_SPDIFOUTB_CTRL>;
+ clock-names = "sysclk",
+ "gate_spdifout", "clk_spdifout";
+ //pinctrl-names = "spdif_pins";
+ //pinctrl-0 = <&spdifout>;
+ status = "okay";
+ };
+ aml_pdm: pdm {
+ compatible = "amlogic, g12a-snd-pdm";
+ #sound-dai-cells = <0>;
+ clocks = <&clkaudio CLKID_AUDIO_PDM
+ &clkc CLKID_FCLK_DIV3
+ &clkc CLKID_MPLL3
+ &clkaudio CLKID_AUDIO_PDMIN0
+ &clkaudio CLKID_AUDIO_PDMIN1>;
+ clock-names = "gate",
+ "sysclk_srcpll",
+ "dclk_srcpll",
+ "pdm_dclk",
+ "pdm_sysclk";
+ pinctrl-names = "pdm_pins";
+ pinctrl-0 = <&pdmin>;
+ filter_mode = <1>; /* mode 0~4, defalut:1 */
+ status = "okay";
+ };
+ aml_pwrdet: pwrdet {
+ compatible = "amlogic, g12a-power-detect";
+
+ interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "pwrdet_irq";
+
+ /* pwrdet source sel
+ * 7: loopback;
+ * 6: tdmin_lb;
+ * 5: reserved;
+ * 4: pdmin;
+ * 3: spdifin;
+ * 2: tdmin_c;
+ * 1: tdmin_b;
+ * 0: tdmin_a;
+ */
+ pwrdet_src = <4>;
+
+ hi_th = <0x70000>;
+ lo_th = <0x16000>;
+
+ status = "disabled";
+ };
+}; /* end of audiobus */
+
+&pinctrl_periphs {
+ tdmout_a: tdmout_a {
+ mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */
+ groups = "tdma_sclk",
+ "tdma_fs",
+ "tdma_dout0";
+ function = "tdma_out";
+ };
+ };
+
+ tdmin_a: tdmin_a {
+ mux { /* GPIOX_8 */
+ groups = "tdma_din1";
+ function = "tdma_in";
+ };
+ };
+
+ tdmb_mclk: tdmb_mclk {
+ mux {
+ groups = "mclk0_a";
+ function = "mclk0";
+ };
+ };
+ tdmout_b: tdmout_b {
+ mux { /* GPIOA_1, GPIOA_2, GPIOA_3 */
+ groups = "tdmb_sclk",
+ "tdmb_fs",
+ "tdmb_dout0";
+ function = "tdmb_out";
+ };
+ };
+
+ tdmin_b:tdmin_b {
+ mux { /* GPIOA_4 */
+ groups = "tdmb_din1";
+ function = "tdmb_in";
+ };
+ };
+
+ tdmc_mclk: tdmc_mclk {
+ mux { /* GPIOA_11 */
+ groups = "mclk1_a";
+ function = "mclk1";
+ };
+ };
+
+ tdmout_c:tdmout_c {
+ mux { /* GPIOA_12, GPIOA_13, GPIOA_10, GPIOA_8, GPIOA_7*/
+ groups = "tdmc_sclk_a",
+ "tdmc_fs_a",
+ "tdmc_dout0_a"
+ /*, "tdmc_dout2",
+ * "tdmc_dout3"
+ */;
+ function = "tdmc_out";
+ };
+ };
+
+ tdmin_c:tdmin_c {
+ mux { /* GPIOA_9 */
+ groups = "tdmc_din1_a";
+ function = "tdmc_in";
+ };
+ };
+
+ spdifin: spdifin {
+ mux {/* GPIOH_5 */
+ groups = "spdif_in_h";
+ function = "spdif_in";
+ };
+ };
+
+ /* GPIOH_4 */
+ /*
+ * spdifout: spdifout {
+ * mux {
+ * groups = "spdif_out_h";
+ * function = "spdif_out";
+ * };
+ *};
+ */
+
+ pdmin: pdmin {
+ mux { /* gpioa_5, gpioa_6, gpioa_7, gpioa_8, gpioa_9*/
+ groups = "pdm_din0_a",
+ /*"pdm_din1_a",*/
+ "pdm_din2_a",
+ "pdm_din3_a",
+ "pdm_dclk_a";
+ function = "pdm";
+ };
+ };
+
+ bl_pwm_on_pins: bl_pwm_on_pin {
+ mux {
+ groups = "pwm_f_h";
+ function = "pwm_f";
+ };
+ };
+
+}; /* end of pinctrl_periphs */
+&pinctrl_aobus {
+ spdifout: spdifout {
+ mux { /* gpiao_10 */
+ groups = "spdif_out_ao";
+ function = "spdif_out_ao";
+ };
+ };
+}; /* end of pinctrl_aobus */
+/* Audio Related End */
+
+&aobus{
+ uart_AO: serial@3000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0x3000 0x0 0x18>;
+ interrupts = <0 193 1>;
+ status = "okay";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ xtal_tick_en = <2>;
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_uart_pins>;
+ support-sysrq = <0>; /* 0 not support , 1 support */
+ };
+
+ uart_AO_B: serial@4000 {
+ compatible = "amlogic, meson-uart";
+ reg = <0x0 0x4000 0x0 0x18>;
+ interrupts = <0 197 1>;
+ status = "disable";
+ clocks = <&xtal>;
+ clock-names = "clk_uart";
+ fifosize = < 64 >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ao_b_uart_pins>;
+ };
+};
+
+&spicc1 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spicc1_pins>;
+ cs-gpios = <&gpio GPIOH_6 0>;
+};
+
+&pwm_ef {
+ status = "okay";
+};
+
+&drm_vpu{
+ compatible = "amlogic,meson-g12a";
+ reg = <0x0 0xff900000 0x0 0x40000>,
+ <0x0 0xff63c000 0x0 0x2000>,
+ <0x0 0xff638000 0x0 0x2000>;
+};
+