Check for FP16 CPU support in optimized pooling kernels

Resolves COMPMID-4123

Change-Id: I0c3c852c9d887cffc0d2e65142f75204ab5e3ff4
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4894
Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>

diff --git a/src/core/NEON/kernels/assembly/NEPoolingAssemblyWrapperKernel.cpp b/src/core/NEON/kernels/assembly/NEPoolingAssemblyWrapperKernel.cpp
index 3c84f36435b62c1536ef573ea25829ed6f265649..a73200e6f660e751b4ffad55b4de87534df5f9c5 100644 (file)
--- a/src/core/NEON/kernels/assembly/NEPoolingAssemblyWrapperKernel.cpp
+++ b/src/core/NEON/kernels/assembly/NEPoolingAssemblyWrapperKernel.cpp
@@ -26,6 +26,7 @@
 #include "arm_compute/core/Validate.h"
 #include "arm_compute/core/utils/misc/ShapeCalculator.h"
 #include "arm_compute/core/utils/quantization/AsymmHelpers.h"
+#include "src/core/CPP/Validate.h"
 #include "src/core/helpers/AutoConfiguration.h"
 #include "src/core/helpers/WindowHelpers.h"
 
@@ -86,6 +87,7 @@ Status NEPoolingAssemblyWrapperKernel::validate(const ITensorInfo *input, const
 {
     ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output);
 
+    ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(input);
     ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::QASYMM8, DataType::QASYMM8_SIGNED, DataType::F16, DataType::F32);
     ARM_COMPUTE_RETURN_ERROR_ON_MSG((input->data_layout() != DataLayout::NHWC) || (info.data_layout != DataLayout::NHWC), "Only NHWC is supported by assembly kernels");
     ARM_COMPUTE_RETURN_ERROR_ON_MSG((info.pool_type != PoolingType::AVG) && (info.pool_type != PoolingType::MAX),