ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS
authorDmitry Osipenko <digetx@gmail.com>
Thu, 19 Mar 2020 19:02:28 +0000 (22:02 +0300)
committerThierry Reding <treding@nvidia.com>
Wed, 6 May 2020 17:02:20 +0000 (19:02 +0200)
Set min/max voltage and couple CPU/CORE regulators.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra30-beaver.dts

index 45ef600..a143cac 100644 (file)
 
                                vddctrl_reg: vddctrl {
                                        regulator-name = "vdd_cpu,vdd_sys";
-                                       regulator-min-microvolt = <1000000>;
-                                       regulator-max-microvolt = <1000000>;
+                                       regulator-min-microvolt = <800000>;
+                                       regulator-max-microvolt = <1250000>;
+                                       regulator-coupled-with = <&core_vdd_reg>;
+                                       regulator-coupled-max-spread = <300000>;
+                                       regulator-max-step-microvolt = <100000>;
                                        regulator-always-on;
+
+                                       nvidia,tegra-cpu-regulator;
                                };
 
                                vio_reg: vio {
                        };
                };
 
-               tps62361@60 {
+               core_vdd_reg: tps62361@60 {
                        compatible = "ti,tps62361";
                        reg = <0x60>;
 
                        regulator-name = "tps62361-vout";
                        regulator-min-microvolt = <500000>;
                        regulator-max-microvolt = <1500000>;
+                       regulator-coupled-with = <&vddctrl_reg>;
+                       regulator-coupled-max-spread = <300000>;
+                       regulator-max-step-microvolt = <100000>;
                        regulator-boot-on;
                        regulator-always-on;
                        ti,vsel0-state-high;
                        ti,vsel1-state-high;
+
+                       nvidia,tegra-core-regulator;
                };
        };