mei_hcsr_set(dev);
}
+/**
+ * mei_hw_reset - resets fw via mei csr register.
+ *
+ * @dev: the device structure
+ * @interrupts_enabled: if interrupt should be enabled after reset.
+ */
+void mei_hw_reset(struct mei_device *dev, bool intr_enable)
+{
+ u32 hcsr = mei_hcsr_read(dev);
+
+ dev_dbg(&dev->pdev->dev, "before reset HCSR = 0x%08x.\n", hcsr);
+
+ hcsr |= (H_RST | H_IG);
+
+ if (intr_enable)
+ hcsr |= H_IE;
+ else
+ hcsr &= ~H_IE;
+
+ hcsr &= ~H_IS;
+
+ mei_reg_write(dev, H_CSR, hcsr);
+ hcsr = mei_hcsr_read(dev);
+
+ hcsr &= ~H_RST;
+ hcsr |= H_IG;
+ hcsr &= ~H_IS;
+
+ mei_reg_write(dev, H_CSR, hcsr);
+
+ hcsr = mei_hcsr_read(dev);
+
+ dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", hcsr);
+}
+
/**
* mei_interrupt_quick_handler - The ISR of the MEI device
}
/**
- * mei_hw_reset - resets fw via mei csr register.
- *
- * @dev: the device structure
- * @interrupts_enabled: if interrupt should be enabled after reset.
- */
-static void mei_hw_reset(struct mei_device *dev, int interrupts_enabled)
-{
- dev->host_hw_state |= (H_RST | H_IG);
-
- if (interrupts_enabled)
- mei_enable_interrupts(dev);
- else
- mei_disable_interrupts(dev);
-}
-
-/**
* mei_reset - resets host and fw.
*
* @dev: the device structure
dev->dev_state != MEI_DEV_POWER_DOWN &&
dev->dev_state != MEI_DEV_POWER_UP);
- dev->host_hw_state = mei_hcsr_read(dev);
-
- dev_dbg(&dev->pdev->dev, "before reset host_hw_state = 0x%08x.\n",
- dev->host_hw_state);
-
mei_hw_reset(dev, interrupts_enabled);
- dev->host_hw_state &= ~H_RST;
- dev->host_hw_state |= H_IG;
-
- mei_hcsr_set(dev);
-
- dev_dbg(&dev->pdev->dev, "currently saved host_hw_state = 0x%08x.\n",
- dev->host_hw_state);
if (dev->dev_state != MEI_DEV_INITIALIZING) {
if (dev->dev_state != MEI_DEV_DISABLED &&
* Register Access Function
*/
+void mei_hw_reset(struct mei_device *dev, bool intr_enable);
u32 mei_hcsr_read(const struct mei_device *dev);
void mei_hcsr_set(struct mei_device *dev);
u32 mei_mecsr_read(const struct mei_device *dev);