configs: drop CONFIG_MMCROOT
authorPeng Fan <peng.fan@nxp.com>
Fri, 15 Apr 2022 04:23:41 +0000 (12:23 +0800)
committerStefano Babic <sbabic@denx.de>
Thu, 21 Apr 2022 13:18:17 +0000 (15:18 +0200)
CONFIG_MMCROOT is only used to set mmcroot, no need a dedicated macro.

Script as below
"
 for i in `ls include/configs/*.h`
 do
 mmcroot=`sed -n '/define.*MMCROOT/ p' $i  | awk -F\" '{ print $2;}'`

 if [ ! -n "$mmcroot" ]; then
  continue
 fi

 sed -i '/define.*MMCROOT/ d' $i
 sed -i 's,\" CONFIG_MMCROOT \",'$mmcroot',g' $i

 done
"

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
27 files changed:
include/configs/aristainetos2.h
include/configs/capricorn-common.h
include/configs/cgtqmx8.h
include/configs/cl-som-imx7.h
include/configs/imx7-cm.h
include/configs/imx8mm-cl-iot-gate.h
include/configs/imx8mm_evk.h
include/configs/imx8mn_evk.h
include/configs/imx8mp_evk.h
include/configs/imx8mp_rsb3720.h
include/configs/imx8mq_cm.h
include/configs/imx8mq_evk.h
include/configs/imx8mq_phanbell.h
include/configs/imx8qm_mek.h
include/configs/imx8qm_rom7720.h
include/configs/imx8qxp_mek.h
include/configs/imx8ulp_evk.h
include/configs/liteboard.h
include/configs/mx6sllevk.h
include/configs/mx6ul_14x14_evk.h
include/configs/mx6ullevk.h
include/configs/mx7ulp_com.h
include/configs/mx7ulp_evk.h
include/configs/phycore_imx8mm.h
include/configs/phycore_imx8mp.h
include/configs/pico-imx8mq.h
include/configs/xpress.h

index 611b6d7..0dcd4ca 100644 (file)
@@ -26,7 +26,6 @@
 
 #include "mx6_common.h"
 
-#define CONFIG_MMCROOT         "/dev/mmcblk0p1"
 
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC1_BASE_ADDR
                "${pubkey}\0" \
        "mainRargs=setenv bootargs console=${console},${baudrate} " \
                "rescue_sysnum=${rescue_sysnum} root=${emmcroot} rootfstype=ext4\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        "mmcRargs=setenv bootargs console=${console},${baudrate} " \
index 58d7a3a..08534cd 100644 (file)
 #define CONFIG_SYS_INIT_SP_ADDR                0x80200000
 
 /* On CCP board, USDHC1 is for eMMC */
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"  /* eMMC */
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM_1                   0x80000000
index bd5c072..4b4694e 100644 (file)
@@ -78,7 +78,7 @@
        "fdt_file=imx8qm-cgt-qmx8.dtb\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x80200000
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
index 8af80f5..4b494d8 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2" /* USDHC1 */
 #endif
 
 /* USB Configs */
index 46ca1c5..2d9f8bb 100644 (file)
@@ -31,7 +31,7 @@
        "fdt_addr=0x83000000\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
                "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
@@ -83,7 +83,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
 #define CONFIG_SYS_FSL_USDHC_NUM               2
 
-#define CONFIG_MMCROOT                                 "/dev/mmcblk0p2"  /* USDHC1 */
 
 /* USB Configs */
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
index b2cde03..c20c32b 100644 (file)
@@ -88,7 +88,7 @@
        "bootm_size=0x10000000\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define PHYS_SDRAM                     0x40000000
index f4b6353..42b7848 100644 (file)
@@ -52,7 +52,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -63,7 +63,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index f969314..86b75ab 100644 (file)
@@ -51,7 +51,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -62,7 +62,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index 35fc27b..cc8d65c 100644 (file)
@@ -61,7 +61,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -72,7 +72,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 /* Totally 6GB DDR */
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
index 2553f0d..c5dd545 100644 (file)
        "bootm_size=0x10000000\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 /* Totally 6GB or 4G DDR */
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
index a3bb3c9..989486a 100644 (file)
@@ -55,7 +55,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -66,7 +66,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index 94886fa..f7929e5 100644 (file)
@@ -62,7 +62,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -73,7 +73,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index ef5992d..f641011 100644 (file)
@@ -52,7 +52,7 @@
        "initrd_high=0xffffffffffffffff\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index 8a26922..9452ba5 100644 (file)
@@ -50,7 +50,7 @@
        "initrd_high=0xffffffffffffffff\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 /* Default environment is in SD */
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM_1                   0x80000000
index 7532c6e..04a2216 100644 (file)
@@ -66,7 +66,7 @@
        "initrd_addr=0x83800000\0"              \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
  * USDHC2 is for SD, USDHC3 is for SD on base board
  */
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"  /* USDHC3 */
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
index 0157793..c290c19 100644 (file)
@@ -48,7 +48,7 @@
        "initrd_high=0xffffffffffffffff\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 /* Default environment is in SD */
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM_1                   0x80000000
index f078c37..46cba33 100644 (file)
@@ -58,7 +58,7 @@
        "initrd_addr=0x83800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -67,7 +67,6 @@
 #define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM                     0x80000000
index d0960bc..e8fd4e7 100644 (file)
@@ -35,7 +35,7 @@
        "ip_dyn=yes\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* FLASH and environment organization */
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"
 
 /* USB Configs */
 #ifdef CONFIG_CMD_USB
index 0793028..1b32f58 100644 (file)
@@ -25,7 +25,7 @@
        "ip_dyn=yes\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
@@ -92,7 +92,6 @@
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Environment organization */
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"  /* USDHC1 */
 
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC1_BASE_ADDR
index 17e7ae0..72554d1 100644 (file)
@@ -47,7 +47,7 @@
        "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* environment organization */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 /* USB Configs */
 #ifdef CONFIG_CMD_USB
index dfcdc00..bc494b4 100644 (file)
@@ -43,7 +43,7 @@
        "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* environment organization */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_IOMUX_LPSR
 
index ce6afcd..f8a5009 100644 (file)
@@ -17,8 +17,6 @@
 
 #define CONFIG_SYS_BOOTM_LEN           0x1000000
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"
-
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR                 WDG1_RBASE
 
@@ -41,7 +39,7 @@
        "fdt_addr=0x63000000\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
index e80d748..7644274 100644 (file)
@@ -13,7 +13,6 @@
 
 #define CONFIG_SYS_BOOTM_LEN           0x1000000
 
-#define CONFIG_MMCROOT                  "/dev/mmcblk0p2"  /* USDHC1 */
 
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR                 WDG1_RBASE
@@ -47,7 +46,7 @@
        "ip_dyn=yes\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
index 528cda0..71f0c42 100644 (file)
@@ -77,7 +77,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"  /* USDHC3 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 
index db53096..0c963b6 100644 (file)
@@ -77,7 +77,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"  /* USDHC3 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 
index 495fddf..9584527 100644 (file)
@@ -46,7 +46,7 @@
        "initrd_high=0xffffffffffffffff\0"                              \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0"              \
        "mmcpart=1\0"   \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0"                      \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0"                  \
        "mmcautodetect=yes\0"                                           \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript="                                               \
@@ -80,7 +80,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR                \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"        /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define PHYS_SDRAM                     0x40000000
index 13cfa2c..43b67a3 100644 (file)
@@ -34,7 +34,6 @@
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Environment is in stored in the eMMC boot partition */
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"  /* USDHC2 */
 
 /* USB Configs */
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
@@ -61,7 +60,7 @@
        "ip_dyn=yes\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \