drm/i915/dsi: use afe_clk() instead of intel_dsi_bitrate()
authorJani Nikula <jani.nikula@intel.com>
Tue, 10 Dec 2019 10:50:55 +0000 (12:50 +0200)
committerJani Nikula <jani.nikula@intel.com>
Wed, 11 Dec 2019 06:16:16 +0000 (08:16 +0200)
We'll be expanding afe_clk() to take DSC into account. Switch to using
it where DSC matters. Which is really everywhere that
intel_dsi_bitrate() is currently used in ICL DSI code.

The functional difference is that we round the result closest instead of
down.

Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b6c52b320daa8aaa0d79618ce714170f8f04ff67.1575974743.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/icl_dsi.c

index de37432..d576f29 100644 (file)
@@ -539,7 +539,7 @@ static void gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder)
         * leave all fields at HW default values.
         */
        if (IS_GEN(dev_priv, 11)) {
-               if (intel_dsi_bitrate(intel_dsi) <= 800000) {
+               if (afe_clk(encoder) <= 800000) {
                        for_each_dsi_port(port, intel_dsi->ports) {
                                tmp = I915_READ(DPHY_TA_TIMING_PARAM(port));
                                tmp &= ~TA_SURE_MASK;
@@ -649,7 +649,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
                        tmp |= EOTP_DISABLED;
 
                /* enable link calibration if freq > 1.5Gbps */
-               if (intel_dsi_bitrate(intel_dsi) >= 1500 * 1000) {
+               if (afe_clk(encoder) >= 1500 * 1000) {
                        tmp &= ~LINK_CALIBRATION_MASK;
                        tmp |= CALIBRATION_ENABLED_INITIAL_ONLY;
                }
@@ -930,7 +930,7 @@ static void gen11_dsi_setup_timeouts(struct intel_encoder *encoder)
         * TIME_NS = (BYTE_CLK_COUNT * 8 * 10^6)/ Bitrate
         * ESCAPE_CLK_COUNT  = TIME_NS/ESC_CLK_NS
         */
-       divisor = intel_dsi_tlpx_ns(intel_dsi) * intel_dsi_bitrate(intel_dsi) * 1000;
+       divisor = intel_dsi_tlpx_ns(intel_dsi) * afe_clk(encoder) * 1000;
        mul = 8 * 1000000;
        hs_tx_timeout = DIV_ROUND_UP(intel_dsi->hs_tx_timeout * mul,
                                     divisor);
@@ -1300,7 +1300,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
                pipe_config->pipe_bpp = 18;
 
        pipe_config->clock_set = true;
-       pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
+       pipe_config->port_clock = afe_clk(encoder) / 5;
 
        return 0;
 }