Add template of High-Level Design document (#261)

Template of High-Level Design Document v1.0

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+# SW High Level Design
+
+**Revision history**
+
+| Ver. | Date       | Contents        | Author          | Approver     |
+| ---- | ---------- | --------------- | --------------- | ------------ |
+| 0.1  | 2018.05.25 | Initial version | Vostokov Sergey | Sung-Jae Lee |
+
+**Terminology and Abbreviation**
+
+|              |                                                               |
+| ------------ | ------------------------------------------------------------- |
+| OS           | Operating System                                              |
+| OS API       | Application interface of OS                                   |
+| HW           | Hardware                                                      |
+| SW           | Software                                                      |
+| NN           | Neural Network                                                |
+| NN model     | Neural network model (Instance of NN built with ML framework) |
+| NN compiler  | The compiler for neural network                               |
+| ML framework | The machine learning framework                                |
+| TF/TF Lite   | Tensorflow/Tensorflow Lite ML framework                       |
+| IR           | Intermediate representation                                   |
+| CI/CI system | Continuous integration system                                 |
+| UI           | The user interface                                            |
+| GUI          | The graphical user interface                                  |
+| CLI          | The command-line interface                                    |
+
+## Overview
+
+### Scope
+
+The main goal of the project is to develop a compiler for neural
+networks to produce executable artefact for specified SW and HW
+platform.
+
+The development scope includes the following components:
+
+  - Develop importer module to parse, verify and represent NN model for
+    further optimization and compilation
+  - Develop code emitters to produce executable binary for CPU and GPU
+
+2018 year goals:
+
+  - Support TensorFlow Lite NN model format
+  - Support Caffe NN model format
+  - Support Caffe2 NN model format (Optional)
+  - Support compilation of MobileNet NN
+  - Support compilation of Inception v3 NN
+  - Support ARM CPU
+  - Support ARM GPU (Mali)
+  - Support Tizen OS
+  - Support SmartMachine OS(Optional)
+
+| Product             | Target Model Name              | Comment          |
+| ------------------- | ------------------------------ | ---------------- |
+| Tizen phone         | Tizen TM2                      | Reference device |
+| Tizen device        | Odroid XU4                     | Reference board  |
+| SmartMachine target | Microvision mv8890, exynos8890 | Reference device |
+
+1-1. Target Model
+
+### Design Consideration
+
+### Constraints
+
+## SW System Architecture Design
+
+### Overall Architecture
+
+### Composition of Architecture
+
+| Layer or Subsystem Name | Description |
+| ----------------------- | ----------- |
+|  |
+|  |
+|  |
+
+### Interface
+
+## SW System Operation Design
+
+## Appendix 1. Tracebility Matrix