define i1 @is_pow2_ctpop(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ult i32 %t0, 2
define i1 @is_pow2_ctpop_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ult i32 %t0, 2
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[NOTZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ult i32 %t0, 2
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[NOTZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ult i32 %t0, 2
define <2 x i1> @is_pow2_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2_ctpop_commute_vec(
; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> [[T0]], <i8 1, i8 1>
-; CHECK-NEXT: ret <2 x i1> [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[T0]], <i8 1, i8 1>
+; CHECK-NEXT: ret <2 x i1> [[R]]
;
%t0 = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> %x)
%cmp = icmp ult <2 x i8> %t0, <i8 2, i8 2>
define i1 @isnot_pow2_ctpop(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ugt i32 %t0, 1
define i1 @isnot_pow2_ctpop_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ugt i32 %t0, 1
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[ISZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ugt i32 %t0, 1
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[ISZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ugt i32 %t0, 1
define <2 x i1> @isnot_pow2_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_commute_vec(
; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne <2 x i8> [[T0]], <i8 1, i8 1>
-; CHECK-NEXT: ret <2 x i1> [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[T0]], <i8 1, i8 1>
+; CHECK-NEXT: ret <2 x i1> [[R]]
;
%t0 = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> %x)
%cmp = icmp ugt <2 x i8> %t0, <i8 1, i8 1>
define i1 @is_pow2_negate_op(i32 %x) {
; CHECK-LABEL: @is_pow2_negate_op(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[TMP1]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%neg = sub i32 0, %x
%and = and i32 %neg, %x
define i1 @is_pow2_negate_op_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_negate_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[TMP1]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%neg = sub i32 0, %x
%and = and i32 %neg, %x
define <2 x i1> @is_pow2_negate_op_vec(<2 x i32> %x) {
; CHECK-LABEL: @is_pow2_negate_op_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 1, i32 1>
-; CHECK-NEXT: ret <2 x i1> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 1, i32 1>
+; CHECK-NEXT: ret <2 x i1> [[R]]
;
%neg = sub <2 x i32> zeroinitializer, %x
%and = and <2 x i32> %neg, %x
define i1 @is_pow2_decrement_op(i8 %x) {
; CHECK-LABEL: @is_pow2_decrement_op(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%dec = add i8 %x, -1
%and = and i8 %dec, %x
define i1 @is_pow2_decrement_op_logical(i8 %x) {
; CHECK-LABEL: @is_pow2_decrement_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%dec = add i8 %x, -1
%and = and i8 %dec, %x
define <2 x i1> @is_pow2_decrement_op_vec(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2_decrement_op_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 1, i8 1>
-; CHECK-NEXT: ret <2 x i1> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 1, i8 1>
+; CHECK-NEXT: ret <2 x i1> [[R]]
;
%dec = add <2 x i8> %x, <i8 -1, i8 -1>
%and = and <2 x i8> %dec, %x
define i1 @isnot_pow2_negate_op(i32 %x) {
; CHECK-LABEL: @isnot_pow2_negate_op(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[TMP1]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%neg = sub i32 0, %x
%and = and i32 %neg, %x
define i1 @isnot_pow2_negate_op_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_negate_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[TMP1]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%neg = sub i32 0, %x
%and = and i32 %neg, %x
define <2 x i1> @isnot_pow2_negate_op_vec(<2 x i32> %x) {
; CHECK-LABEL: @isnot_pow2_negate_op_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i32> [[TMP1]], <i32 1, i32 1>
-; CHECK-NEXT: ret <2 x i1> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i32> [[TMP1]], <i32 1, i32 1>
+; CHECK-NEXT: ret <2 x i1> [[R]]
;
%neg = sub <2 x i32> zeroinitializer, %x
%and = and <2 x i32> %neg, %x
define i1 @isnot_pow2_decrement_op(i8 %x) {
; CHECK-LABEL: @isnot_pow2_decrement_op(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[TMP1]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%dec = add i8 %x, -1
%and = and i8 %dec, %x
define i1 @isnot_pow2_decrement_op_logical(i8 %x) {
; CHECK-LABEL: @isnot_pow2_decrement_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[TMP1]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%dec = add i8 %x, -1
%and = and i8 %dec, %x
define <2 x i1> @isnot_pow2_decrement_op_vec(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2_decrement_op_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], <i8 1, i8 1>
-; CHECK-NEXT: ret <2 x i1> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], <i8 1, i8 1>
+; CHECK-NEXT: ret <2 x i1> [[R]]
;
%dec = add <2 x i8> %x, <i8 -1, i8 -1>
%and = and <2 x i8> %dec, %x
define i1 @is_pow2or0_ctpop(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[T0]], 2
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[T0]], 2
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp eq i32 %t0, 1
define i1 @is_pow2or0_ctpop_swap_cmp(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_swap_cmp(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[T0]], 2
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[T0]], 2
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp eq i32 %t0, 1
define i1 @is_pow2or0_ctpop_logical(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[T0]], 2
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[T0]], 2
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp eq i32 %t0, 1
define <2 x i1> @is_pow2or0_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_commute_vec(
; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i8> [[T0]], <i8 2, i8 2>
-; CHECK-NEXT: ret <2 x i1> [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ult <2 x i8> [[T0]], <i8 2, i8 2>
+; CHECK-NEXT: ret <2 x i1> [[R]]
;
%t0 = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> %x)
%cmp = icmp eq <2 x i8> %t0, <i8 1, i8 1>
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[ISZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[T0]], 2
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[T0]], 2
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
call void @use(i32 %t0)
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[ISZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[T0]], 2
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[T0]], 2
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
call void @use(i32 %t0)
ret i1 %r
}
+define i1 @is_pow2or0_ctpop_wrong_pred2(i32 %x) {
+; CHECK-LABEL: @is_pow2or0_ctpop_wrong_pred2(
+; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[T0]], 1
+; CHECK-NEXT: [[ISZERO:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
+ %cmp = icmp ne i32 %t0, 1
+ %iszero = icmp ne i32 %x, 0
+ %r = or i1 %iszero, %cmp
+ ret i1 %r
+}
+
define i1 @is_pow2or0_ctpop_wrong_pred2_logical(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_wrong_pred2_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
define i1 @isnot_pow2nor0_ctpop(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ne i32 %t0, 1
define i1 @isnot_pow2nor0_ctpop_swap_cmp(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_swap_cmp(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ne i32 %t0, 1
define i1 @isnot_pow2nor0_ctpop_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ne i32 %t0, 1
define <2 x i1> @isnot_pow2nor0_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_commute_vec(
; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i8> [[T0]], <i8 1, i8 1>
-; CHECK-NEXT: ret <2 x i1> [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[T0]], <i8 1, i8 1>
+; CHECK-NEXT: ret <2 x i1> [[R]]
;
%t0 = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> %x)
%cmp = icmp ne <2 x i8> %t0, <i8 1, i8 1>
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[NOTZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
call void @use(i32 %t0)
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[NOTZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[T0]], 1
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
call void @use(i32 %t0)
ret i1 %r
}
+define i1 @isnot_pow2nor0_ctpop_wrong_pred2(i32 %x) {
+; CHECK-LABEL: @isnot_pow2nor0_ctpop_wrong_pred2(
+; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 1
+; CHECK-NEXT: [[NOTZERO:%.*]] = icmp eq i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
+ %cmp = icmp eq i32 %t0, 1
+ %notzero = icmp eq i32 %x, 0
+ %r = and i1 %notzero, %cmp
+ ret i1 %r
+}
+
define i1 @isnot_pow2nor0_ctpop_wrong_pred2_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_wrong_pred2_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]