phy: cadence: Sierra: Check for PLL lock during PHY power on

Check for PLL lock during PHY power on.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c
index 497c838..62bff4b 100644 (file)
--- a/drivers/phy/cadence/phy-cadence-sierra.c
+++ b/drivers/phy/cadence/phy-cadence-sierra.c
@@ -55,6 +55,7 @@
 #define SIERRA_PLLCTRL_SUBRATE_PREG                    0x03A
 #define SIERRA_PLLCTRL_GEN_D_PREG                      0x03E
 #define SIERRA_PLLCTRL_CPGAIN_MODE_PREG                        0x03F
+#define SIERRA_PLLCTRL_STATUS_PREG                     0x044
 #define SIERRA_CLKPATH_BIASTRIM_PREG                   0x04B
 #define SIERRA_DFE_BIASTRIM_PREG                       0x04C
 #define SIERRA_DRVCTRL_ATTEN_PREG                      0x06A
@@ -141,11 +142,14 @@
 
 #define SIERRA_MACRO_ID                                        0x00007364
 #define SIERRA_MAX_LANES                               4
+#define PLL_LOCK_TIME                                  100000
 
 static const struct reg_field macro_id_type =
                                REG_FIELD(SIERRA_MACRO_ID_REG, 0, 15);
 static const struct reg_field phy_pll_cfg_1 =
                                REG_FIELD(SIERRA_PHY_PLL_CFG, 1, 1);
+static const struct reg_field pllctrl_lock =
+                               REG_FIELD(SIERRA_PLLCTRL_STATUS_PREG, 0, 0);
 
 struct cdns_sierra_inst {
        struct phy *phy;
@@ -192,6 +196,7 @@ struct cdns_sierra_phy {
        struct regmap *regmap_common_cdb;
        struct regmap_field *macro_id_type;
        struct regmap_field *phy_pll_cfg_1;
+       struct regmap_field *pllctrl_lock[SIERRA_MAX_LANES];
        struct clk *clk;
        int nsubnodes;
        bool autoconf;
@@ -291,10 +296,25 @@ static int cdns_sierra_phy_init(struct phy *gphy)
 
 static int cdns_sierra_phy_on(struct phy *gphy)
 {
+       struct cdns_sierra_phy *sp = dev_get_drvdata(gphy->dev.parent);
        struct cdns_sierra_inst *ins = phy_get_drvdata(gphy);
+       struct device *dev = sp->dev;
+       u32 val;
+       int ret;
 
        /* Take the PHY lane group out of reset */
-       return reset_control_deassert(ins->lnk_rst);
+       ret = reset_control_deassert(ins->lnk_rst);
+       if (ret) {
+               dev_err(dev, "Failed to take the PHY lane out of reset\n");
+               return ret;
+       }
+
+       ret = regmap_field_read_poll_timeout(sp->pllctrl_lock[ins->mlane],
+                                            val, val, 1000, PLL_LOCK_TIME);
+       if (ret < 0)
+               dev_err(dev, "PLL lock of lane failed\n");
+
+       return ret;
 }
 
 static int cdns_sierra_phy_off(struct phy *gphy)
@@ -350,6 +370,7 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp)
        struct device *dev = sp->dev;
        struct regmap_field *field;
        struct regmap *regmap;
+       int i;
 
        regmap = sp->regmap_common_cdb;
        field = devm_regmap_field_alloc(dev, regmap, macro_id_type);
@@ -367,6 +388,16 @@ static int cdns_regfield_init(struct cdns_sierra_phy *sp)
        }
        sp->phy_pll_cfg_1 = field;
 
+       for (i = 0; i < SIERRA_MAX_LANES; i++) {
+               regmap = sp->regmap_lane_cdb[i];
+               field = devm_regmap_field_alloc(dev, regmap, pllctrl_lock);
+               if (IS_ERR(field)) {
+                       dev_err(dev, "P%d_ENABLE reg field init failed\n", i);
+                       return PTR_ERR(field);
+               }
+               sp->pllctrl_lock[i] =  field;
+       }
+
        return 0;
 }