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drm/amdgpu: mmVM_L2_CNTL3 register not initialized correctly
author
Qu Huang
<jinsdb@126.com>
Tue, 23 Aug 2022 06:44:06 +0000
(14:44 +0800)
committer
Greg Kroah-Hartman
<gregkh@linuxfoundation.org>
Thu, 15 Sep 2022 09:30:02 +0000
(11:30 +0200)
[ Upstream commit
b8983d42524f10ac6bf35bbce6a7cc8e45f61e04
]
The mmVM_L2_CNTL3 register is not assigned an initial value
Signed-off-by: Qu Huang <jinsdb@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
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diff --git
a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index b3bede1dc41da43df93ffc09174df15811deae8c..4259f623a9d7a047eb2c2a88a0cecd4f6382d5f8 100644
(file)
--- a/
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@
-176,6
+176,7
@@
static void mmhub_v1_0_init_cache_regs(struct amdgpu_device *adev)
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp);
+ tmp = mmVM_L2_CNTL3_DEFAULT;
if (adev->gmc.translate_further) {
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 12);
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3,