ARM: 8649/2: nommu: remove Hivecs configuration is asm

Now that exception based address is handled dynamically for
processors with CP15, remove Hivecs configuration in assembly.

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Tested-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 6b4eb27..2e21e08 100644 (file)
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -152,11 +152,6 @@ __after_proc_init:
 #ifdef CONFIG_CPU_ICACHE_DISABLE
        bic     r0, r0, #CR_I
 #endif
-#ifdef CONFIG_CPU_HIGH_VECTOR
-       orr     r0, r0, #CR_V
-#else
-       bic     r0, r0, #CR_V
-#endif
        mcr     p15, 0, r0, c1, c0, 0           @ write control reg
 #elif defined (CONFIG_CPU_V7M)
        /* For V7M systems we want to modify the CCR similarly to the SCTLR */