drm/amdgpu: Report vram vendor with sysfs (v3)
authorOri Messinger <Ori.Messinger@amd.com>
Wed, 2 Oct 2019 14:02:07 +0000 (10:02 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 7 Oct 2019 20:11:07 +0000 (15:11 -0500)
The vram vendor can be found as a separate sysfs file at:
/sys/class/drm/card[X]/device/mem_info_vram_vendor
The vram vendor is displayed as a string value.

v2: Use correct bit masking, and cache vram_vendor in gmc
v3: Drop unused functions for vram width, type, and vendor

Signed-off-by: Ori Messinger <ori.messinger@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index 19913c3..39fd8ae 100644 (file)
@@ -169,8 +169,11 @@ static int convert_atom_mem_type_to_vram_type(struct amdgpu_device *adev,
        return vram_type;
 }
 
-int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
-                                     int *vram_width, int *vram_type)
+
+int
+amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
+                                 int *vram_width, int *vram_type,
+                                 int *vram_vendor)
 {
        struct amdgpu_mode_info *mode_info = &adev->mode_info;
        int index, i = 0;
@@ -180,6 +183,7 @@ int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
        union vram_module *vram_module;
        u8 frev, crev;
        u8 mem_type;
+       u8 mem_vendor;
        u32 mem_channel_number;
        u32 mem_channel_width;
        u32 module_id;
@@ -231,6 +235,9 @@ int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
                                mem_channel_width = vram_module->v9.channel_width;
                                if (vram_width)
                                        *vram_width = mem_channel_number * (1 << mem_channel_width);
+                               mem_vendor = (vram_module->v9.vender_rev_id) & 0xF;
+                               if (vram_vendor)
+                                       *vram_vendor = mem_vendor;
                                break;
                        case 4:
                                if (module_id > vram_info->v24.vram_module_num)
@@ -248,6 +255,9 @@ int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
                                mem_channel_width = vram_module->v10.channel_width;
                                if (vram_width)
                                        *vram_width = mem_channel_number * (1 << mem_channel_width);
+                               mem_vendor = (vram_module->v10.vender_rev_id) & 0xF;
+                               if (vram_vendor)
+                                       *vram_vendor = mem_vendor;
                                break;
                        default:
                                return -EINVAL;
index 82819f0..53449fc 100644 (file)
@@ -30,7 +30,7 @@ bool amdgpu_atomfirmware_gpu_supports_virtualization(struct amdgpu_device *adev)
 void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
 int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
-                                     int *vram_width, int *vram_type);
+       int *vram_width, int *vram_type, int *vram_vendor);
 int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
 int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
 bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);
index d591b37..555d8e5 100644 (file)
@@ -157,6 +157,7 @@ struct amdgpu_gmc {
        uint32_t                fw_version;
        struct amdgpu_irq_src   vm_fault;
        uint32_t                vram_type;
+       uint8_t                 vram_vendor;
        uint32_t                srbm_soft_reset;
        bool                    prt_warning;
        uint64_t                stolen_size;
index 8887b39..82a3299 100644 (file)
@@ -24,6 +24,8 @@
 
 #include "amdgpu.h"
 #include "amdgpu_vm.h"
+#include "amdgpu_atomfirmware.h"
+#include "atom.h"
 
 struct amdgpu_vram_mgr {
        struct drm_mm mm;
@@ -102,6 +104,39 @@ static ssize_t amdgpu_mem_info_vis_vram_used_show(struct device *dev,
                amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]));
 }
 
+static ssize_t amdgpu_mem_info_vram_vendor(struct device *dev,
+                                                struct device_attribute *attr,
+                                                char *buf)
+{
+       struct drm_device *ddev = dev_get_drvdata(dev);
+       struct amdgpu_device *adev = ddev->dev_private;
+
+       switch (adev->gmc.vram_vendor) {
+       case SAMSUNG:
+               return snprintf(buf, PAGE_SIZE, "samsung\n");
+       case INFINEON:
+               return snprintf(buf, PAGE_SIZE, "infineon\n");
+       case ELPIDA:
+               return snprintf(buf, PAGE_SIZE, "elpida\n");
+       case ETRON:
+               return snprintf(buf, PAGE_SIZE, "etron\n");
+       case NANYA:
+               return snprintf(buf, PAGE_SIZE, "nanya\n");
+       case HYNIX:
+               return snprintf(buf, PAGE_SIZE, "hynix\n");
+       case MOSEL:
+               return snprintf(buf, PAGE_SIZE, "mosel\n");
+       case WINBOND:
+               return snprintf(buf, PAGE_SIZE, "winbond\n");
+       case ESMT:
+               return snprintf(buf, PAGE_SIZE, "esmt\n");
+       case MICRON:
+               return snprintf(buf, PAGE_SIZE, "micron\n");
+       default:
+               return snprintf(buf, PAGE_SIZE, "unknown\n");
+       }
+}
+
 static DEVICE_ATTR(mem_info_vram_total, S_IRUGO,
                   amdgpu_mem_info_vram_total_show, NULL);
 static DEVICE_ATTR(mem_info_vis_vram_total, S_IRUGO,
@@ -110,6 +145,8 @@ static DEVICE_ATTR(mem_info_vram_used, S_IRUGO,
                   amdgpu_mem_info_vram_used_show, NULL);
 static DEVICE_ATTR(mem_info_vis_vram_used, S_IRUGO,
                   amdgpu_mem_info_vis_vram_used_show, NULL);
+static DEVICE_ATTR(mem_info_vram_vendor, S_IRUGO,
+                  amdgpu_mem_info_vram_vendor, NULL);
 
 /**
  * amdgpu_vram_mgr_init - init VRAM manager and DRM MM
@@ -155,6 +192,11 @@ static int amdgpu_vram_mgr_init(struct ttm_mem_type_manager *man,
                DRM_ERROR("Failed to create device file mem_info_vis_vram_used\n");
                return ret;
        }
+       ret = device_create_file(adev->dev, &dev_attr_mem_info_vram_vendor);
+       if (ret) {
+               DRM_ERROR("Failed to create device file mem_info_vram_vendor\n");
+               return ret;
+       }
 
        return 0;
 }
@@ -181,6 +223,7 @@ static int amdgpu_vram_mgr_fini(struct ttm_mem_type_manager *man)
        device_remove_file(adev->dev, &dev_attr_mem_info_vis_vram_total);
        device_remove_file(adev->dev, &dev_attr_mem_info_vram_used);
        device_remove_file(adev->dev, &dev_attr_mem_info_vis_vram_used);
+       device_remove_file(adev->dev, &dev_attr_mem_info_vram_vendor);
        return 0;
 }
 
index cb3f618..fb48622 100644 (file)
@@ -624,7 +624,7 @@ static unsigned gmc_v10_0_get_vbios_fb_size(struct amdgpu_device *adev)
 
 static int gmc_v10_0_sw_init(void *handle)
 {
-       int r, vram_width = 0, vram_type = 0;
+       int r, vram_width = 0, vram_type = 0, vram_vendor = 0;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        gfxhub_v2_0_init(adev);
@@ -632,13 +632,15 @@ static int gmc_v10_0_sw_init(void *handle)
 
        spin_lock_init(&adev->gmc.invalidate_lock);
 
-       r = amdgpu_atomfirmware_get_vram_info(adev, &vram_width, &vram_type);
+       r = amdgpu_atomfirmware_get_vram_info(adev,
+               &vram_width, &vram_type, &vram_vendor);
        if (!amdgpu_emu_mode)
                adev->gmc.vram_width = vram_width;
        else
                adev->gmc.vram_width = 1 * 128; /* numchan * chansize */
 
        adev->gmc.vram_type = vram_type;
+       adev->gmc.vram_vendor = vram_vendor;
        switch (adev->asic_type) {
        case CHIP_NAVI10:
        case CHIP_NAVI14:
index 4b11f7e..defeb6a 100644 (file)
@@ -930,7 +930,7 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
 
 static int gmc_v9_0_sw_init(void *handle)
 {
-       int r, vram_width = 0, vram_type = 0;
+       int r, vram_width = 0, vram_type = 0, vram_vendor = 0;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        gfxhub_v1_0_init(adev);
@@ -941,7 +941,8 @@ static int gmc_v9_0_sw_init(void *handle)
 
        spin_lock_init(&adev->gmc.invalidate_lock);
 
-       r = amdgpu_atomfirmware_get_vram_info(adev, &vram_width, &vram_type);
+       r = amdgpu_atomfirmware_get_vram_info(adev,
+               &vram_width, &vram_type, &vram_vendor);
        if (amdgpu_sriov_vf(adev))
                /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
                 * and DF related registers is not readable, seems hardcord is the
@@ -965,6 +966,7 @@ static int gmc_v9_0_sw_init(void *handle)
        }
 
        adev->gmc.vram_type = vram_type;
+       adev->gmc.vram_vendor = vram_vendor;
        switch (adev->asic_type) {
        case CHIP_RAVEN:
                adev->num_vmhubs = 2;