ARM: dts: Exynos4210: add CPU OPP and regulator supply property
authorThomas Abraham <thomas.ab@samsung.com>
Fri, 3 Apr 2015 16:43:47 +0000 (18:43 +0200)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Thu, 14 May 2015 05:42:52 +0000 (14:42 +0900)
For Exynos4210 platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific
cpufreq driver to using generic cpufreq driver.

Changes by Bartlomiej:
- removed Exynos5250 and Exynos5420 support for now

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Andreas Farber <afaerber@suse.de>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
arch/arm/boot/dts/exynos4210-origen.dts
arch/arm/boot/dts/exynos4210-trats.dts
arch/arm/boot/dts/exynos4210-universal_c210.dts
arch/arm/boot/dts/exynos4210.dtsi

index b811461414023fa293c75130d30d840fa4e5d3af..5b0941f08ed583d4811cd9c99b710adc32147f64 100644 (file)
                };
        };
 };
+
+&cpu0 {
+       cpu0-supply = <&buck1_reg>;
+};
index 32c5fd8f6269d9c5932de0d715e7763f99541057..9b5bdd0d037e8d6bb357498d5a02aded5a206399 100644 (file)
                };
        };
 };
+
+&cpu0 {
+       cpu0-supply = <&varm_breg>;
+};
index d4f2b11319dd10d4d7b79fa295d55e63baccff9c..5bf74dad5b2dd480f92a076d0133d9d4b07f49aa 100644 (file)
 &mdma1 {
        reg = <0x12840000 0x1000>;
 };
+
+&cpu0 {
+       cpu0-supply = <&vdd_arm_reg>;
+};
index 19a8e711e61627f7b223c320ec7468b2b9261184..69f341657db2df0e69ec4ed5684634f2f3035a41 100644 (file)
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0x900>;
+                       clocks = <&clock CLK_ARM_CLK>;
+                       clock-names = "cpu";
+                       clock-latency = <160000>;
+
+                       operating-points = <
+                               1200000 1250000
+                               1000000 1150000
+                               800000  1075000
+                               500000  975000
+                               400000  975000
+                               200000  950000
+                       >;
                        cooling-min-level = <4>;
                        cooling-max-level = <2>;
                        #cooling-cells = <2>; /* min followed by max */