ARM: dts: bcm2710-rpi-3: Change build macro for optee 60/227860/1
authorSeung-Woo Kim <sw0312.kim@samsung.com>
Mon, 16 Mar 2020 10:06:53 +0000 (19:06 +0900)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Tue, 17 Mar 2020 01:29:45 +0000 (10:29 +0900)
Now, Tizen does not support optee by default. Change build macro
for optee related nodes in default case.

Change-Id: Ib925414ba6fd96099ca984cc8b665263812b9538
Ref: https://bugs.tizen.org/browse/TRE-2318
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
arch/arm/boot/dts/bcm2710-rpi-3-b.dts
arch/arm/boot/dts/bcm2710.dtsi

index f5277e10f7cb936004104ddbdf379379650dcb0e..cdd87668d649766406c2056ea5bde66bd75fa6cd 100644 (file)
@@ -1,6 +1,6 @@
 /dts-v1/;
 
-#ifdef RPI364
+#ifdef RPI364_OPTEE
 /memreserve/ 0x00000000 0x00001000;
 /memreserve/ 0x08000000 0x02000000;
 #endif
index a15932a4e2ee9423c76c3967c9fbc54d9ef34f04..5cac3e42bd22cfa418444738708797fe9f485e36 100644 (file)
@@ -50,6 +50,7 @@
        };
 
 #ifdef RPI364
+#ifdef RPI364_OPTEE
        firmware {
                optee {
                        compatible = "linaro,optee-tz";
@@ -61,6 +62,7 @@
                compatible = "arm,psci-0.2";
                method = "smc";
        };
+#endif
 
        cpus: cpus {
                #address-cells = <1>;
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x1>;
                        clock-frequency = <1200000000>;
+#ifdef RPI364_OPTEE
                        enable-method = "psci";
+#else
+                       enable-method = "spin-table";
+                       cpu-release-addr = <0x0 0x000000e0>;
+#endif
                };
 
                v8_cpu2: cpu@2 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x2>;
                        clock-frequency = <1200000000>;
+#ifdef RPI364_OPTEE
                        enable-method = "psci";
+#else
+                       enable-method = "spin-table";
+                       cpu-release-addr = <0x0 0x000000e8>;
+#endif
                };
 
                v8_cpu3: cpu@3 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0x3>;
                        clock-frequency = <1200000000>;
+#ifdef RPI364_OPTEE
                        enable-method = "psci";
+#else
+                       enable-method = "spin-table";
+                       cpu-release-addr = <0x0 0x000000f0>;
+#endif
                };
        };