CONFIG_SCSI) you must configure support for at
least one non-MTD partition type as well.
-- LBA48 Support
- CONFIG_LBA48
-
- Set this to enable support for disks larger than 137GB
- Also look at CONFIG_SYS_64BIT_LBA.
- Whithout these , LBA48 support uses 32bit variables and will 'only'
- support disks up to 2.1TB.
-
- CONFIG_SYS_64BIT_LBA:
- When enabled, makes the IDE subsystem use 64bit sector addresses.
- Default is 32bit.
-
- NETWORK Support (PCI):
CONFIG_E1000_SPI
Utility code for direct access to the SPI bus on Intel 8257x.
#define __io
/* Data, registers and alternate blocks are at the same offset */
/* Each 8-bit ATA register is aligned to a 4-bytes address */
-/* Controller supports 48-bits LBA addressing */
-#define CONFIG_LBA48
/* CONFIG_IDE requires some #defines for ATA registers */
/* ATA registers base is at SATA controller base */
#endif /* CONFIG_IDE */
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SYS_PBSIZE=1024
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SYS_PBSIZE=1024
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_CMD_DFU=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_STACK=0x8000
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=1
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y
+CONFIG_LBA48=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_NETCONSOLE=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SPL_I2C=y
CONFIG_SYS_PBSIZE=1024
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_E1000=y
CONFIG_SPI=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_ACPIGEN is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_RTL8169=y
CONFIG_SPI=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_ACPIGEN is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_ACPIGEN is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_ACPIGEN is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_ACPIGEN is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_LPC=y
CONFIG_RTL8169=y
CONFIG_NET_RETRY_COUNT=50
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_MISC=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
# CONFIG_DWC_AHSATA_AHCI is not set
+CONFIG_LBA48=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_ACPIGEN is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_E1000=y
CONFIG_SOUND=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=2
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=2
+CONFIG_LBA48=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_NUVOTON_NCT6102D=y
CONFIG_ARP_TIMEOUT=200
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
CONFIG_DM_I2C=y
CONFIG_SYS_ATA_DATA_OFFSET=0x100
CONFIG_SYS_ATA_REG_OFFSET=0x100
CONFIG_SYS_ATA_ALT_OFFSET=0x100
+CONFIG_LBA48=y
CONFIG_KIRKWOOD_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_SYS_ATA_DATA_OFFSET=0x100
CONFIG_SYS_ATA_REG_OFFSET=0x100
CONFIG_SYS_ATA_ALT_OFFSET=0x100
+CONFIG_LBA48=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SYS_ATA_DATA_OFFSET=0x100
CONFIG_SYS_ATA_REG_OFFSET=0x100
CONFIG_SYS_ATA_ALT_OFFSET=0x100
+CONFIG_LBA48=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
CONFIG_SYS_ATA_REG_OFFSET=0x100
CONFIG_SYS_ATA_ALT_OFFSET=0x100
CONFIG_SYS_ATA_IDE0_OFFSET=0x4000
+CONFIG_LBA48=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
# CONFIG_GZIP is not set
CONFIG_EFI=y
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
# CONFIG_GZIP is not set
CONFIG_EFI=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_ATA_DATA_OFFSET=0x100
CONFIG_SYS_ATA_REG_OFFSET=0x100
CONFIG_SYS_ATA_ALT_OFFSET=0x100
+CONFIG_LBA48=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_ENV_IS_IN_NVRAM=y
CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_BOOTCOUNT_LIMIT=y
# CONFIG_MMC is not set
CONFIG_CALXEDA_XGMAC=y
CONFIG_SYS_ATA_ALT_OFFSET=0x100
CONFIG_SYS_ATA_IDE0_OFFSET=0x2000
CONFIG_SYS_ATA_IDE1_OFFSET=0x4000
+CONFIG_LBA48=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_RTL8169=y
CONFIG_SPI=y
CONFIG_ARP_TIMEOUT=200
CONFIG_NET_RETRY_COUNT=50
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_MISC=y
CONFIG_ARP_TIMEOUT=200
CONFIG_NET_RETRY_COUNT=50
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CLK=y
CONFIG_CLK_MVEBU=y
# CONFIG_MVEBU_GPIO is not set
CONFIG_ARP_TIMEOUT=200
CONFIG_NET_RETRY_COUNT=50
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_MISC=y
CONFIG_ARP_TIMEOUT=200
CONFIG_NET_RETRY_COUNT=50
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_AHCI_PCI=y
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CLK=y
CONFIG_CLK_MVEBU=y
CONFIG_DM_I2C=y
CONFIG_NET_RETRY_COUNT=50
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_MISC=y
CONFIG_NET_RETRY_COUNT=50
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SPL_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_ATA_DATA_OFFSET=0x100
CONFIG_SYS_ATA_REG_OFFSET=0x100
CONFIG_SYS_ATA_ALT_OFFSET=0x100
+CONFIG_LBA48=y
CONFIG_KIRKWOOD_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=2
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=2
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
CONFIG_BLK=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_SYS_I2C_LEGACY=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x12000000
CONFIG_SYS_I2C_LEGACY=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_TFTP_TSIZE=y
CONFIG_SATA=y
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CLK=y
# CONFIG_INPUT is not set
CONFIG_MISC=y
CONFIG_TFTP_TSIZE=y
CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_TFTP_TSIZE=y
CONFIG_SCSI_AHCI=y
CONFIG_AHCI_PCI=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SYS_ATA_ALT_OFFSET=0x100
CONFIG_SYS_ATA_IDE0_OFFSET=0x2000
CONFIG_SYS_ATA_IDE1_OFFSET=0x4000
+CONFIG_LBA48=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_ATA_ALT_OFFSET=0x100
CONFIG_SYS_ATA_IDE0_OFFSET=0x2000
CONFIG_SYS_ATA_IDE1_OFFSET=0x4000
+CONFIG_LBA48=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_ATA_ALT_OFFSET=0x100
CONFIG_SYS_ATA_IDE0_OFFSET=0x2000
CONFIG_SYS_ATA_IDE1_OFFSET=0x4000
+CONFIG_LBA48=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_KIRKWOOD_GPIO=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MVEBU_MMC=y
CONFIG_SIMPLE_BUS_CORRECT_RANGE=y
CONFIG_BLK=y
CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_LBA48=y
CONFIG_CHIP_SELECTS_PER_CTRL=0
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_NVME_PCI=y
CONFIG_SPL_DM_RTC=y
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_NVME_PCI=y
CONFIG_SPI=y
CONFIG_DM=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=2
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_MVEBU_MMC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_ACPIGEN is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
# CONFIG_PCI_PNP is not set
CONFIG_CONSOLE_SCROLL_LINES=5
# CONFIG_GZIP is not set
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_E1000=y
CONFIG_SPI=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_TFTP_TSIZE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CPU=y
CONFIG_DM_I2C=y
CONFIG_NUVOTON_NCT6102D=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_SATA_MV=y
CONFIG_SYS_SATA_MAX_DEVICE=1
+CONFIG_LBA48=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_RAM=y
CONFIG_FPGA_ALTERA=y
CONFIG_NET_RETRY_COUNT=50
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_AHCI_MVEBU=y
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
CONFIG_CLK=y
CONFIG_CLK_MVEBU=y
CONFIG_DM_I2C=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_DM=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
+CONFIG_LBA48=y
CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
depends on PPC
select AHCI
select LIBATA
+ imply LBA48
help
Enable this driver to support the SATA controller found in
some Freescale PowerPC SoCs.
must be defined in a board-specific file.
endif # IDE
+
+config LBA48
+ bool "Enable LBA support for disks larger than 137GB"
+ depends on HAVE_BLOCK_DEVICE
+ help
+ Set this to enable support for disks larger than 137GB.
+ Also look at CONFIG_SYS_64BIT_LBA. Without both of these, LBA48
+ support uses 32bit variables and will 'only' support disks up to
+ 2.1TB.
+
+config SYS_64BIT_LBA
+ bool "Enable 64bit number of blocks on a block device"
+ depends on HAVE_BLOCK_DEVICE
+ help
+ Make the block subsystem use 64bit sector addresses, rather than the
+ default of 32bit.
#ifdef CONFIG_IDE
/* ATA */
# define CONFIG_IDE_PREINIT 1
-# undef CONFIG_LBA48
#endif
#ifdef CONFIG_DRIVER_DM9000
#endif
/*
- * SATA
- */
-#ifdef CONFIG_FSL_SATA
-#define CONFIG_LBA48
-#endif
-
-/*
* Environment
*/
#endif /* CONFIG_TSEC_ENET */
-/* SATA */
-
-#ifdef CONFIG_FSL_SATA
-#define CONFIG_LBA48
-#endif /* #ifdef CONFIG_FSL_SATA */
-
#ifdef CONFIG_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#endif
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
-/* SATA */
-
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_LBA48
-#endif
-
#ifdef CONFIG_FMAN_ENET
#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3
#define CONFIG_PCIE3
-#define CONFIG_LBA48
-
#define CONFIG_SYS_SRIO
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
-/* SATA */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_LBA48
-#endif
-
/*
* USB
*/
#endif
/*
- * SATA
- */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_LBA48
-#endif
-
-/*
* USB
*/
#endif
/*
- * SATA
- */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_LBA48
-#endif
-
-/*
* USB
*/
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
-/* SATA */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_LBA48
-#endif
-
/*
* Environment
*/
#define CORTINA_PHY_ADDR4 FM2_10GEC2_PHY_ADDR
#endif
-/* SATA */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_LBA48
-#endif
-
/*
* USB
*/
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 3
-/*
- * SATA Configs
- */
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_LBA48
-#endif
-
/* Network */
#define PHY_ANEG_TIMEOUT 15000 /* PHY needs longer aneg time */
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-/* SATA */
-#define CONFIG_LBA48
-
/* Boot */
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif /* CONFIG_PCI */
-/* SATA */
-#ifdef CONFIG_FSL_SATA_V2
-#define CONFIG_LBA48
-#endif
-
#ifdef CONFIG_FMAN_ENET
#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c
#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d
#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
-/* SATA support */
-#define CONFIG_LBA48
-
/* PCIe support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 3
-/* SATA Configs */
-#define CONFIG_LBA48
-
/* UART */
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */
#define CONFIG_PHY_BASE_ADR 0
-/*
- * SATA Driver configuration
- */
-#define CONFIG_LBA48
-
#endif /* _CONFIG_DREAMPLUG_H */
#define __io
/* Data, registers and alternate blocks are at the same offset */
/* Each 8-bit ATA register is aligned to a 4-bytes address */
-/* Controller supports 48-bits LBA addressing */
-#define CONFIG_LBA48
/* A single bus, a single device */
/* ATA registers base is at SATA controller base */
/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
#include "mx6_common.h"
#include <linux/sizes.h>
-/* SATA Configs */
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_LBA48
-#endif
-
#ifdef CONFIG_CMD_NFS
#define NETWORKBOOT \
"setnetworkboot=" \
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 0
-/* SATA driver configuration */
-#define CONFIG_LBA48
-
#endif /* _CONFIG_GOFLEXHOME_H */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/*
- * SATA Configs
- */
-#ifdef CONFIG_CMD_SATA
- #define CONFIG_LBA48
-#endif
-
-/*
* PCI express
*/
#ifdef CONFIG_CMD_PCI
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_64BIT_LBA
-
/* Environment data setup
*/
#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
#endif
/*
- * SATA Driver configuration
- */
-
-#ifdef CONFIG_SATA
-#define CONFIG_SYS_64BIT_LBA
-#define CONFIG_LBA48
-#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_D2NET_V2) || \
- defined(CONFIG_NET2BIG_V2)
-#endif
-#endif /* CONFIG_SATA */
-
-/*
* Enable GPI0 support
*/
#define CONFIG_PHY_BASE_ADR 7
#endif /* CONFIG_CMD_NET */
-#ifdef CONFIG_SATA
-#define CONFIG_SYS_64BIT_LBA
-#define CONFIG_LBA48
-#endif
-
#endif /* _CONFIG_LSXL_H */
#endif
/*
- * SATA
- */
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_LBA48
-#endif
-
-/*
* LCD
*/
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
-/*
- * SATA/SCSI/AHCI configuration
- */
-#define CONFIG_LBA48
-#define CONFIG_SYS_64BIT_LBA
-
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
/* USB ethernet */
/*
- * SATA/SCSI/AHCI configuration
- */
-#define CONFIG_LBA48
-#define CONFIG_SYS_64BIT_LBA
-
-/*
* PCI configuration
*/
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
-#ifdef CONFIG_CMD_SATA
- #define CONFIG_LBA48
-#endif
-
/* Framebuffer and LCD */
#endif /* __CONFIG_H */
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
-/* SATA Configuration */
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_LBA48
-#endif
-
/* Framebuffer */
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
-/*
- * SATA Configs
- */
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_LBA48
-#endif
-
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 6
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
-/* SATA Configs */
-#define CONFIG_LBA48
-
/* UART */
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 1
-/* Support large HDDs for USB and SATA */
-#define CONFIG_LBA48
-#define CONFIG_SYS_64BIT_LBA
-
#endif /* _CONFIG_NSA310S_H */
#ifndef __CONFIG_H__
#define __CONFIG_H__
-/*
- * SATA/SCSI/AHCI configuration
- */
-/* AHCI support Definitions */
-/** Enable 48-bit SATA addressing */
-#define CONFIG_LBA48
-/** Enable 64-bit addressing */
-#define CONFIG_SYS_64BIT_LBA
-
#include "octeon_common.h"
#endif /* __CONFIG_H__ */
/** Heap size for U-Boot */
-/* AHCI support Definitions */
-#ifdef CONFIG_DM_SCSI
-/** Enable 48-bit SATA addressing */
-# define CONFIG_LBA48
-/** Enable 64-bit addressing */
-# define CONFIG_SYS_64BIT_LBA
-#endif
-
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192
/** EMMC specific defines */
#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
-#define CONFIG_LBA48
-
#define CONFIG_HWCONFIG
/*
* These can be toggled for performance analysis, otherwise use default.
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 0
-/*
- * Support large disk for SATA and USB
- */
-#define CONFIG_SYS_64BIT_LBA
-#define CONFIG_LBA48
-
#endif /* _CONFIG_POGO_V4_H */
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
-#define CONFIG_LBA48
-
/* RTC */
#define CONFIG_RTC_PT7C4338
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 0
-/*
- * Support large disk for SATA and USB
- */
-#define CONFIG_SYS_64BIT_LBA
-#define CONFIG_LBA48
-
#endif /* _CONFIG_SHEEVAPLUG_H */
#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
-#ifdef CONFIG_AHCI
-#define CONFIG_SYS_64BIT_LBA
-#endif
-
#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
#define CONFIG_SYS_MAX_NAND_DEVICE 8
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
#endif
-/* SATA */
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_LBA48
-#define CONFIG_SYS_64BIT_LBA
-#endif
-
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
"fdt_high=0x10000000\0" \
"initrd_high=0x10000000\0"
-/* SATA support */
-#define CONFIG_LBA48
-
/* FPGA programming support */
#define CONFIG_FPGA_STRATIX_V
#define CONFIG_MXC_UART_BASE UART2_BASE
-/* SATA Configs */
-#define CONFIG_LBA48
-
/* MMC Configuration */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_MXC_UART_BASE UART1_BASE
-/* SATA Configs */
-
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_LBA48
-#endif
-
/* MMC Configuration */
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
*/
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
-/* SATA AHCI storage */
-#ifdef CONFIG_SCSI_AHCI
-#define CONFIG_LBA48
-#define CONFIG_SYS_64BIT_LBA
-
-#endif
-
/* Generic TPM interfaced through LPC bus */
#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000