riscv: dts: starfive: Add StarFive VisionFive V1 device tree
authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Mon, 17 Oct 2022 21:05:42 +0000 (00:05 +0300)
committerJaehoon Chung <jh80.chung@samsung.com>
Mon, 24 Jul 2023 23:24:28 +0000 (08:24 +0900)
Add initial device tree for the StarFive VisionFive V1 SBC, which
is similar with the already supported BeagleV Starlight Beta board,
both being based on the StarFive JH7100 SoC.

Link: https://github.com/starfive-tech/VisionFive
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/Makefile
arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts [new file with mode: 0644]

index 0ea1bc1..039c143 100644 (file)
@@ -1,2 +1,2 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb
+dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts
new file mode 100644 (file)
index 0000000..e82af72
--- /dev/null
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2021 StarFive Technology Co., Ltd.
+ * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
+ */
+
+/dts-v1/;
+#include "jh7100-common.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       model = "StarFive VisionFive V1";
+       compatible = "starfive,visionfive-v1", "starfive,jh7100";
+
+       gpio-restart {
+               compatible = "gpio-restart";
+               gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
+               priority = <224>;
+       };
+};