drm/i915/dg1: make Wa_22010271021 permanent
authorLucas De Marchi <lucas.demarchi@intel.com>
Tue, 27 Oct 2020 04:32:28 +0000 (21:32 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 17 Nov 2020 05:30:04 +0000 (21:30 -0800)
Just like for rkl and tgl, this should be permanent as well for dg1
instead just for A0. The commit making it permanent for those platforms
ended up "racing" with the commit adding the DG1 WAs, so now fix that up.

v2: Add "tgl,dg1" to WA comment (Matt)

Cc: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201027043228.696518-3-lucas.demarchi@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c

index adc9a8ea410a3a2242c454c2347a41728375b0da..a82554baa6acf8f1e7873d872807378e6636f8fa 100644 (file)
@@ -1770,6 +1770,14 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                 */
                wa_write_or(wal, GEN7_FF_THREAD_MODE,
                            GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
+
+               /*
+                * Wa_1606700617:tgl,dg1
+                * Wa_22010271021:tgl,rkl,dg1
+                */
+               wa_masked_en(wal,
+                            GEN9_CS_DEBUG_MODE1,
+                            FF_DOP_CLOCK_GATE_DISABLE);
        }
 
        if (IS_DG1_REVID(i915, DG1_REVID_A0, DG1_REVID_A0) ||
@@ -1798,14 +1806,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                             GEN6_RC_SLEEP_PSMI_CONTROL,
                             GEN12_WAIT_FOR_EVENT_POWER_DOWN_DISABLE |
                             GEN8_RC_SEMA_IDLE_MSG_DISABLE);
-
-               /*
-                * Wa_1606700617:tgl
-                * Wa_22010271021:tgl,rkl
-                */
-               wa_masked_en(wal,
-                            GEN9_CS_DEBUG_MODE1,
-                            FF_DOP_CLOCK_GATE_DISABLE);
        }
 
        if (IS_GEN(i915, 12)) {