Alexei Starovoitov says:
====================
Make two verifier improvements:
- The llvm register allocator may use two different registers representing
the same virtual register. Teach the verifier to recognize that.
- Track bounded scalar spill/fill.
The profiler[123] test in patch 3 will fail to load without patches 1 and 2.
The profiler[23] test may fail to load on older llvm due to speculative
code motion nd instruction combining optimizations that are fixed in
https://reviews.llvm.org/D85570
v1 -> v2:
- fixed 32-bit mov issue spotted by John.
- allowed r2=r1; r3=r2; sequence as suggested by John.
- added comments, acks, more tests.
====================
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>