radv: allow to use fixed IO locations for VS<->TCS<->TES without linking

For shader objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24408>

diff --git a/src/amd/vulkan/nir/radv_nir_lower_io.c b/src/amd/vulkan/nir/radv_nir_lower_io.c
index 92bee14..da80e7e 100644 (file)
--- a/src/amd/vulkan/nir/radv_nir_lower_io.c
+++ b/src/amd/vulkan/nir/radv_nir_lower_io.c
@@ -114,6 +114,10 @@ enum {
 static unsigned
 radv_map_io_driver_location(unsigned semantic)
 {
+   if ((semantic >= VARYING_SLOT_PATCH0 && semantic < VARYING_SLOT_TESS_MAX) ||
+       semantic == VARYING_SLOT_TESS_LEVEL_INNER || semantic == VARYING_SLOT_TESS_LEVEL_OUTER)
+      return ac_shader_io_get_unique_index_patch(semantic);
+
    switch (semantic) {
    case VARYING_SLOT_POS:
       return RADV_IO_SLOT_POS;
@@ -133,42 +137,38 @@ bool
 radv_nir_lower_io_to_mem(struct radv_device *device, struct radv_shader_stage *stage)
 {
    const struct radv_shader_info *info = &stage->info;
+   ac_nir_map_io_driver_location map_input = info->inputs_linked ? NULL : radv_map_io_driver_location;
+   ac_nir_map_io_driver_location map_output = info->outputs_linked ? NULL : radv_map_io_driver_location;
    nir_shader *nir = stage->nir;
 
    if (nir->info.stage == MESA_SHADER_VERTEX) {
       if (info->vs.as_ls) {
-         NIR_PASS_V(nir, ac_nir_lower_ls_outputs_to_mem, NULL, info->vs.tcs_in_out_eq,
+         NIR_PASS_V(nir, ac_nir_lower_ls_outputs_to_mem, map_output, info->vs.tcs_in_out_eq,
                     info->vs.tcs_temp_only_input_mask);
          return true;
       } else if (info->vs.as_es) {
-         ac_nir_map_io_driver_location map_io = info->outputs_linked ? NULL : radv_map_io_driver_location;
-
-         NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_io, device->physical_device->rad_info.gfx_level,
+         NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_output, device->physical_device->rad_info.gfx_level,
                     info->esgs_itemsize);
          return true;
       }
    } else if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
-      NIR_PASS_V(nir, ac_nir_lower_hs_inputs_to_mem, NULL, info->vs.tcs_in_out_eq);
-      NIR_PASS_V(nir, ac_nir_lower_hs_outputs_to_mem, NULL, device->physical_device->rad_info.gfx_level,
+      NIR_PASS_V(nir, ac_nir_lower_hs_inputs_to_mem, map_input, info->vs.tcs_in_out_eq);
+      NIR_PASS_V(nir, ac_nir_lower_hs_outputs_to_mem, map_output, device->physical_device->rad_info.gfx_level,
                  info->tcs.tes_reads_tess_factors, info->tcs.tes_inputs_read, info->tcs.tes_patch_inputs_read,
                  info->tcs.num_linked_outputs, info->tcs.num_linked_patch_outputs, info->wave_size, false, false, true);
 
       return true;
    } else if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
-      NIR_PASS_V(nir, ac_nir_lower_tes_inputs_to_mem, NULL);
+      NIR_PASS_V(nir, ac_nir_lower_tes_inputs_to_mem, map_input);
 
       if (info->tes.as_es) {
-         ac_nir_map_io_driver_location map_io = info->outputs_linked ? NULL : radv_map_io_driver_location;
-
-         NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_io, device->physical_device->rad_info.gfx_level,
+         NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_output, device->physical_device->rad_info.gfx_level,
                     info->esgs_itemsize);
       }
 
       return true;
    } else if (nir->info.stage == MESA_SHADER_GEOMETRY) {
-      ac_nir_map_io_driver_location map_io = info->inputs_linked ? NULL : radv_map_io_driver_location;
-
-      NIR_PASS_V(nir, ac_nir_lower_gs_inputs_to_mem, map_io, device->physical_device->rad_info.gfx_level, false);
+      NIR_PASS_V(nir, ac_nir_lower_gs_inputs_to_mem, map_input, device->physical_device->rad_info.gfx_level, false);
       return true;
    } else if (nir->info.stage == MESA_SHADER_TASK) {
       ac_nir_lower_task_outputs_to_mem(nir, AC_TASK_PAYLOAD_ENTRY_BYTES,

diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index c242534..b6a8efa 100644 (file)
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -468,6 +468,13 @@ gather_shader_info_tcs(struct radv_device *device, const nir_shader *nir, const
    info->tcs.tes_inputs_read = ~0ULL;
    info->tcs.tes_patch_inputs_read = ~0ULL;
 
+   if (!info->inputs_linked)
+      info->tcs.num_linked_inputs = util_last_bit64(nir->info.inputs_read);
+   if (!info->outputs_linked) {
+      info->tcs.num_linked_outputs = util_last_bit64(nir->info.outputs_written);
+      info->tcs.num_linked_patch_outputs = util_last_bit64(nir->info.patch_outputs_written);
+   }
+
    if (!(pipeline_key->dynamic_patch_control_points)) {
       /* Number of tessellation patches per workgroup processed by the current pipeline. */
       info->num_tess_patches =
@@ -493,6 +500,8 @@ gather_shader_info_tes(struct radv_device *device, const nir_shader *nir, struct
    info->tes.point_mode = nir->info.tess.point_mode;
    info->tes.tcs_vertices_out = nir->info.tess.tcs_vertices_out;
 
+   if (!info->inputs_linked)
+      info->tes.num_linked_inputs = util_last_bit64(nir->info.inputs_read);
    if (!info->outputs_linked)
       info->tes.num_linked_outputs = util_last_bit64(nir->info.outputs_written);