sdio_release_host(func);
if (ret < 0) {
- PRINT_ER("wilc_sdio_cmd52..failed, err(%d)\n", ret);
+ dev_err(&func->dev, "wilc_sdio_cmd52..failed, err(%d)\n", ret);
return 0;
}
return 1;
if (ret < 0) {
- PRINT_ER("wilc_sdio_cmd53..failed, err(%d)\n", ret);
+ dev_err(&func->dev, "wilc_sdio_cmd53..failed, err(%d)\n", ret);
return 0;
}
gpio = GPIO_NUM;
}
- PRINT_D(INIT_DBG, "Initializing netdev\n");
+ dev_dbg(&func->dev, "Initializing netdev\n");
if (wilc_netdev_init(&wilc, &func->dev, HIF_SDIO, gpio,
&wilc_hif_sdio)) {
- PRINT_ER("Couldn't initialize netdev\n");
+ dev_err(&func->dev, "Couldn't initialize netdev\n");
return -1;
}
sdio_set_drvdata(func, wilc);
wilc->dev = &func->dev;
- printk("Driver Initializing success\n");
+ dev_info(&func->dev, "Driver Initializing success\n");
return 0;
}
sdio_release_host(func);
if (ret < 0) {
- PRINT_ER("can't claim sdio_irq, err(%d)\n", ret);
+ dev_err(&func->dev, "can't claim sdio_irq, err(%d)\n", ret);
ret = -EIO;
}
return ret;
struct sdio_func *func = container_of(dev->dev, struct sdio_func, dev);
int ret;
- PRINT_D(INIT_DBG, "wilc_sdio_disable_interrupt IN\n");
+ dev_dbg(&func->dev, "wilc_sdio_disable_interrupt IN\n");
sdio_claim_host(func);
ret = sdio_release_irq(func);
if (ret < 0) {
- PRINT_ER("can't release sdio_irq, err(%d)\n", ret);
+ dev_err(&func->dev, "can't release sdio_irq, err(%d)\n", ret);
}
sdio_release_host(func);
- PRINT_D(INIT_DBG, "wilc_sdio_disable_interrupt OUT\n");
+ dev_info(&func->dev, "wilc_sdio_disable_interrupt OUT\n");
}
int wilc_sdio_init(void)
return -ENOMEM;
tr.rx_buf = r_buffer;
- PRINT_D(BUS_DBG, "Request writing %d bytes\n", len);
+ dev_dbg(&spi->dev, "Request writing %d bytes\n", len);
memset(&msg, 0, sizeof(msg));
spi_message_init(&msg);
ret = spi_sync(spi, &msg);
if (ret < 0) {
- PRINT_ER("SPI transaction failed\n");
+ dev_err(&spi->dev, "SPI transaction failed\n");
}
kfree(r_buffer);
} else {
- PRINT_ER("can't write data with the following length: %d\n", len);
- PRINT_ER("FAILED due to NULL buffer or ZERO length check the following length: %d\n", len);
+ dev_err(&spi->dev,
+ "can't write data with the following length: %d\n",
+ len);
+ dev_err(&spi->dev,
+ "FAILED due to NULL buffer or ZERO length check the following length: %d\n",
+ len);
ret = -1;
}
ret = spi_sync(spi, &msg);
if (ret < 0) {
- PRINT_ER("SPI transaction failed\n");
+ dev_err(&spi->dev, "SPI transaction failed\n");
}
kfree(t_buffer);
} else {
- PRINT_ER("can't read data with the following length: %u\n", rlen);
+ dev_err(&spi->dev,
+ "can't read data with the following length: %u\n",
+ rlen);
ret = -1;
}
/* change return value to match WILC interface */
spi_message_add_tail(&tr, &msg);
ret = spi_sync(spi, &msg);
if (ret < 0) {
- PRINT_ER("SPI transaction failed\n");
+ dev_err(&spi->dev, "SPI transaction failed\n");
}
} else {
- PRINT_ER("can't read data with the following length: %u\n", rlen);
+ dev_err(&spi->dev,
+ "can't read data with the following length: %u\n",
+ rlen);
ret = -1;
}
/* change return value to match WILC interface */
typedef struct {
bool irq_gpio;
u32 block_size;
- wilc_debug_func dPrint;
int nint;
#define MAX_NUN_INT_THRPT_ENH2 (5) /* Max num interrupts allowed in registers 0xf7, 0xf8 */
int has_thrpt_enh3;
static int sdio_set_func0_csa_address(struct wilc *wilc, u32 adr)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
sdio_cmd52_t cmd;
/**
cmd.address = 0x10c;
cmd.data = (u8)adr;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x10c data...\n");
+ dev_err(&func->dev, "Failed cmd52, set 0x10c data...\n");
goto _fail_;
}
cmd.address = 0x10d;
cmd.data = (u8)(adr >> 8);
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x10d data...\n");
+ dev_err(&func->dev, "Failed cmd52, set 0x10d data...\n");
goto _fail_;
}
cmd.address = 0x10e;
cmd.data = (u8)(adr >> 16);
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x10e data...\n");
+ dev_err(&func->dev, "Failed cmd52, set 0x10e data...\n");
goto _fail_;
}
static int sdio_set_func0_block_size(struct wilc *wilc, u32 block_size)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
sdio_cmd52_t cmd;
cmd.read_write = 1;
cmd.address = 0x10;
cmd.data = (u8)block_size;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x10 data...\n");
+ dev_err(&func->dev, "Failed cmd52, set 0x10 data...\n");
goto _fail_;
}
cmd.address = 0x11;
cmd.data = (u8)(block_size >> 8);
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x11 data...\n");
+ dev_err(&func->dev, "Failed cmd52, set 0x11 data...\n");
goto _fail_;
}
static int sdio_set_func1_block_size(struct wilc *wilc, u32 block_size)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
sdio_cmd52_t cmd;
cmd.read_write = 1;
cmd.address = 0x110;
cmd.data = (u8)block_size;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x110 data...\n");
+ dev_err(&func->dev, "Failed cmd52, set 0x110 data...\n");
goto _fail_;
}
cmd.address = 0x111;
cmd.data = (u8)(block_size >> 8);
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0x111 data...\n");
+ dev_err(&func->dev, "Failed cmd52, set 0x111 data...\n");
goto _fail_;
}
static int sdio_clear_int(struct wilc *wilc)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
+
if (!g_sdio.irq_gpio) {
/* u32 sts; */
sdio_cmd52_t cmd;
u32 reg;
if (!sdio_read_reg(wilc, WILC_HOST_RX_CTRL_0, ®)) {
- g_sdio.dPrint(N_ERR, "[wilc spi]: Failed read reg (%08x)...\n", WILC_HOST_RX_CTRL_0);
+ dev_err(&func->dev, "Failed read reg (%08x)...\n",
+ WILC_HOST_RX_CTRL_0);
return 0;
}
reg &= ~0x1;
********************************************/
static int sdio_write_reg(struct wilc *wilc, u32 addr, u32 data)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
+
data = cpu_to_le32(data);
if ((addr >= 0xf0) && (addr <= 0xff)) {
cmd.address = addr;
cmd.data = data;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd 52, read reg (%08x) ...\n", addr);
+ dev_err(&func->dev,
+ "Failed cmd 52, read reg (%08x) ...\n", addr);
goto _fail_;
}
} else {
cmd.block_size = g_sdio.block_size; /* johnny : prevent it from setting unexpected value */
if (!wilc_sdio_cmd53(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53, write reg (%08x)...\n", addr);
+ dev_err(&func->dev,
+ "Failed cmd53, write reg (%08x)...\n", addr);
goto _fail_;
}
}
static int sdio_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
u32 block_size = g_sdio.block_size;
sdio_cmd53_t cmd;
int nblk, nleft;
goto _fail_;
}
if (!wilc_sdio_cmd53(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53 [%x], block send...\n", addr);
+ dev_err(&func->dev,
+ "Failed cmd53 [%x], block send...\n", addr);
goto _fail_;
}
if (addr > 0)
goto _fail_;
}
if (!wilc_sdio_cmd53(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53 [%x], bytes send...\n", addr);
+ dev_err(&func->dev,
+ "Failed cmd53 [%x], bytes send...\n", addr);
goto _fail_;
}
}
static int sdio_read_reg(struct wilc *wilc, u32 addr, u32 *data)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
+
if ((addr >= 0xf0) && (addr <= 0xff)) {
sdio_cmd52_t cmd;
cmd.raw = 0;
cmd.address = addr;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd 52, read reg (%08x) ...\n", addr);
+ dev_err(&func->dev,
+ "Failed cmd 52, read reg (%08x) ...\n", addr);
goto _fail_;
}
*data = cmd.data;
cmd.block_size = g_sdio.block_size; /* johnny : prevent it from setting unexpected value */
if (!wilc_sdio_cmd53(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53, read reg (%08x)...\n", addr);
+ dev_err(&func->dev,
+ "Failed cmd53, read reg (%08x)...\n", addr);
goto _fail_;
}
}
static int sdio_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
u32 block_size = g_sdio.block_size;
sdio_cmd53_t cmd;
int nblk, nleft;
goto _fail_;
}
if (!wilc_sdio_cmd53(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53 [%x], block read...\n", addr);
+ dev_err(&func->dev,
+ "Failed cmd53 [%x], block read...\n", addr);
goto _fail_;
}
if (addr > 0)
goto _fail_;
}
if (!wilc_sdio_cmd53(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd53 [%x], bytes read...\n", addr);
+ dev_err(&func->dev,
+ "Failed cmd53 [%x], bytes read...\n", addr);
goto _fail_;
}
}
static int sdio_sync(struct wilc *wilc)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
u32 reg;
/**
* Disable power sequencer
**/
if (!sdio_read_reg(wilc, WILC_MISC, ®)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read misc reg...\n");
+ dev_err(&func->dev, "Failed read misc reg...\n");
return 0;
}
reg &= ~BIT(8);
if (!sdio_write_reg(wilc, WILC_MISC, reg)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write misc reg...\n");
+ dev_err(&func->dev, "Failed write misc reg...\n");
return 0;
}
**/
ret = sdio_read_reg(wilc, WILC_PIN_MUX_0, ®);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
+ dev_err(&func->dev, "Failed read reg (%08x)...\n",
+ WILC_PIN_MUX_0);
return 0;
}
reg |= BIT(8);
ret = sdio_write_reg(wilc, WILC_PIN_MUX_0, reg);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
+ dev_err(&func->dev, "Failed write reg (%08x)...\n",
+ WILC_PIN_MUX_0);
return 0;
}
**/
ret = sdio_read_reg(wilc, WILC_INTR_ENABLE, ®);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE);
+ dev_err(&func->dev, "Failed read reg (%08x)...\n",
+ WILC_INTR_ENABLE);
return 0;
}
reg |= BIT(16);
ret = sdio_write_reg(wilc, WILC_INTR_ENABLE, reg);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
+ dev_err(&func->dev, "Failed write reg (%08x)...\n",
+ WILC_INTR_ENABLE);
return 0;
}
}
return 1;
}
-static int sdio_init(struct wilc *wilc, wilc_debug_func func)
+static int sdio_init(struct wilc *wilc, wilc_debug_func debug_func)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
sdio_cmd52_t cmd;
int loop;
u32 chipid;
memset(&g_sdio, 0, sizeof(wilc_sdio_t));
- g_sdio.dPrint = func;
g_sdio.irq_gpio = (wilc->dev_irq_num);
if (!wilc_sdio_init()) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed io init bus...\n");
+ dev_err(&func->dev, "Failed io init bus...\n");
return 0;
} else {
return 0;
cmd.address = 0x100;
cmd.data = 0x80;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, enable csa...\n");
+ dev_err(&func->dev, "Fail cmd 52, enable csa...\n");
goto _fail_;
}
* function 0 block size
**/
if (!sdio_set_func0_block_size(wilc, WILC_SDIO_BLOCK_SIZE)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, set func 0 block size...\n");
+ dev_err(&func->dev, "Fail cmd 52, set func 0 block size...\n");
goto _fail_;
}
g_sdio.block_size = WILC_SDIO_BLOCK_SIZE;
cmd.address = 0x2;
cmd.data = 0x2;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio] Fail cmd 52, set IOE register...\n");
+ dev_err(&func->dev,
+ "Fail cmd 52, set IOE register...\n");
goto _fail_;
}
do {
cmd.data = 0;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, get IOR register...\n");
+ dev_err(&func->dev,
+ "Fail cmd 52, get IOR register...\n");
goto _fail_;
}
if (cmd.data == 0x2)
} while (loop--);
if (loop <= 0) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail func 1 is not ready...\n");
+ dev_err(&func->dev, "Fail func 1 is not ready...\n");
goto _fail_;
}
* func 1 is ready, set func 1 block size
**/
if (!sdio_set_func1_block_size(wilc, WILC_SDIO_BLOCK_SIZE)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail set func 1 block size...\n");
+ dev_err(&func->dev, "Fail set func 1 block size...\n");
goto _fail_;
}
cmd.address = 0x4;
cmd.data = 0x3;
if (!wilc_sdio_cmd52(wilc, &cmd)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd 52, set IEN register...\n");
+ dev_err(&func->dev, "Fail cmd 52, set IEN register...\n");
goto _fail_;
}
* make sure can read back chip id correctly
**/
if (!sdio_read_reg(wilc, 0x1000, &chipid)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Fail cmd read chip id...\n");
+ dev_err(&func->dev, "Fail cmd read chip id...\n");
goto _fail_;
}
- g_sdio.dPrint(N_ERR, "[wilc sdio]: chipid (%08x)\n", chipid);
+ dev_err(&func->dev, "chipid (%08x)\n", chipid);
if ((chipid & 0xfff) > 0x2a0)
g_sdio.has_thrpt_enh3 = 1;
else
g_sdio.has_thrpt_enh3 = 0;
- g_sdio.dPrint(N_ERR, "[wilc sdio]: has_thrpt_enh3 = %d...\n", g_sdio.has_thrpt_enh3);
+ dev_info(&func->dev, "has_thrpt_enh3 = %d...\n", g_sdio.has_thrpt_enh3);
return 1;
static int sdio_read_int(struct wilc *wilc, u32 *int_status)
{
-
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
u32 tmp;
sdio_cmd52_t cmd;
tmp |= INT_5;
for (i = g_sdio.nint; i < MAX_NUM_INT; i++) {
if ((tmp >> (IRG_FLAGS_OFFSET + i)) & 0x1) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Unexpected interrupt (1) : tmp=%x, data=%x\n", tmp, cmd.data);
+ dev_err(&func->dev,
+ "Unexpected interrupt (1) : tmp=%x, data=%x\n",
+ tmp, cmd.data);
break;
}
}
static int sdio_clear_int_ext(struct wilc *wilc, u32 val)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
int ret;
if (g_sdio.has_thrpt_enh3) {
ret = wilc_sdio_cmd52(wilc, &cmd);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0xf8 data (%d) ...\n", __LINE__);
+ dev_err(&func->dev,
+ "Failed cmd52, set 0xf8 data (%d) ...\n",
+ __LINE__);
goto _fail_;
}
ret = wilc_sdio_cmd52(wilc, &cmd);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0xf8 data (%d) ...\n", __LINE__);
+ dev_err(&func->dev,
+ "Failed cmd52, set 0xf8 data (%d) ...\n",
+ __LINE__);
goto _fail_;
}
goto _fail_;
for (i = g_sdio.nint; i < MAX_NUM_INT; i++) {
if (flags & 1)
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Unexpected interrupt cleared %d...\n", i);
+ dev_err(&func->dev,
+ "Unexpected interrupt cleared %d...\n",
+ i);
flags >>= 1;
}
}
cmd.data = vmm_ctl;
ret = wilc_sdio_cmd52(wilc, &cmd);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed cmd52, set 0xf6 data (%d) ...\n", __LINE__);
+ dev_err(&func->dev,
+ "Failed cmd52, set 0xf6 data (%d) ...\n",
+ __LINE__);
goto _fail_;
}
}
static int sdio_sync_ext(struct wilc *wilc, int nint)
{
+ struct sdio_func *func = dev_to_sdio_func(wilc->dev);
u32 reg;
if (nint > MAX_NUM_INT) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Too many interupts (%d)...\n", nint);
+ dev_err(&func->dev, "Too many interupts (%d)...\n", nint);
return 0;
}
if (nint > MAX_NUN_INT_THRPT_ENH2) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Error: Cannot support more than 5 interrupts when has_thrpt_enh2=1.\n");
+ dev_err(&func->dev,
+ "Cannot support more than 5 interrupts when has_thrpt_enh2=1.\n");
return 0;
}
* Disable power sequencer
**/
if (!sdio_read_reg(wilc, WILC_MISC, ®)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read misc reg...\n");
+ dev_err(&func->dev, "Failed read misc reg...\n");
return 0;
}
reg &= ~BIT(8);
if (!sdio_write_reg(wilc, WILC_MISC, reg)) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write misc reg...\n");
+ dev_err(&func->dev, "Failed write misc reg...\n");
return 0;
}
**/
ret = sdio_read_reg(wilc, WILC_PIN_MUX_0, ®);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
+ dev_err(&func->dev, "Failed read reg (%08x)...\n",
+ WILC_PIN_MUX_0);
return 0;
}
reg |= BIT(8);
ret = sdio_write_reg(wilc, WILC_PIN_MUX_0, reg);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
+ dev_err(&func->dev, "Failed write reg (%08x)...\n",
+ WILC_PIN_MUX_0);
return 0;
}
**/
ret = sdio_read_reg(wilc, WILC_INTR_ENABLE, ®);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE);
+ dev_err(&func->dev, "Failed read reg (%08x)...\n",
+ WILC_INTR_ENABLE);
return 0;
}
reg |= BIT((27 + i));
ret = sdio_write_reg(wilc, WILC_INTR_ENABLE, reg);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
+ dev_err(&func->dev, "Failed write reg (%08x)...\n",
+ WILC_INTR_ENABLE);
return 0;
}
if (nint) {
ret = sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed read reg (%08x)...\n", WILC_INTR2_ENABLE);
+ dev_err(&func->dev,
+ "Failed read reg (%08x)...\n",
+ WILC_INTR2_ENABLE);
return 0;
}
ret = sdio_read_reg(wilc, WILC_INTR2_ENABLE, ®);
if (!ret) {
- g_sdio.dPrint(N_ERR, "[wilc sdio]: Failed write reg (%08x)...\n", WILC_INTR2_ENABLE);
+ dev_err(&func->dev,
+ "Failed write reg (%08x)...\n",
+ WILC_INTR2_ENABLE);
return 0;
}
}
#include "wilc_wfi_netdevice.h"
typedef struct {
- wilc_debug_func dPrint;
int crc_off;
int nint;
int has_thrpt_enh;
static int spi_cmd_complete(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz,
u8 clockless)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
u8 wb[32], rb[32];
u8 wix, rix;
u32 len2;
#undef NUM_DUMMY_BYTES
if (len2 > ARRAY_SIZE(wb)) {
- PRINT_ER("[wilc spi]: spi buffer size too small (%d) (%zu)\n",
+ dev_err(&spi->dev, "spi buffer size too small (%d) (%zu)\n",
len2, ARRAY_SIZE(wb));
result = N_FAIL;
return result;
rix = len;
if (!wilc_spi_write_read(wilc, wb, rb, len2)) {
- PRINT_ER("[wilc spi]: Failed cmd write, bus error...\n");
+ dev_err(&spi->dev, "Failed cmd write, bus error...\n");
result = N_FAIL;
return result;
}
/* } while(&rptr[1] <= &rb[len2]); */
if (rsp != cmd) {
- PRINT_ER("[wilc spi]: Failed cmd response, cmd (%02x)"
+ dev_err(&spi->dev, "Failed cmd response, cmd (%02x)"
", resp (%02x)\n", cmd, rsp);
result = N_FAIL;
return result;
**/
rsp = rb[rix++];
if (rsp != 0x00) {
- PRINT_ER("[wilc spi]: Failed cmd state response "
- "state (%02x)\n", rsp);
+ dev_err(&spi->dev, "Failed cmd state response state (%02x)\n",
+ rsp);
result = N_FAIL;
return result;
}
} while (retry--);
if (retry <= 0) {
- PRINT_ER("[wilc spi]: Error, data read "
- "response (%02x)\n", rsp);
+ dev_err(&spi->dev,
+ "Error, data read response (%02x)\n", rsp);
result = N_RESET;
return result;
}
b[2] = rb[rix++];
b[3] = rb[rix++];
} else {
- PRINT_ER("[wilc spi]: buffer overrun when reading data.\n");
+ dev_err(&spi->dev,
+ "buffer overrun when reading data.\n");
result = N_FAIL;
return result;
}
crc[0] = rb[rix++];
crc[1] = rb[rix++];
} else {
- PRINT_ER("[wilc spi]: buffer overrun when reading crc.\n");
+ dev_err(&spi->dev,"buffer overrun when reading crc.\n");
result = N_FAIL;
return result;
}
* Read bytes
**/
if (!wilc_spi_read(wilc, &b[ix], nbytes)) {
- PRINT_ER("[wilc spi]: Failed data block read, bus error...\n");
+ dev_err(&spi->dev, "Failed data block read, bus error...\n");
result = N_FAIL;
goto _error_;
}
**/
if (!g_spi.crc_off) {
if (!wilc_spi_read(wilc, crc, 2)) {
- PRINT_ER("[wilc spi]: Failed data block crc read, bus error...\n");
+ dev_err(&spi->dev, "Failed data block crc read, bus error...\n");
result = N_FAIL;
goto _error_;
}
retry = 10;
do {
if (!wilc_spi_read(wilc, &rsp, 1)) {
- PRINT_ER("[wilc spi]: Failed data response read, bus error...\n");
+ dev_err(&spi->dev, "Failed data response read, bus error...\n");
result = N_FAIL;
break;
}
* Read bytes
**/
if (!wilc_spi_read(wilc, &b[ix], nbytes)) {
- PRINT_ER("[wilc spi]: Failed data block read, bus error...\n");
+ dev_err(&spi->dev, "Failed data block read, bus error...\n");
result = N_FAIL;
break;
}
**/
if (!g_spi.crc_off) {
if (!wilc_spi_read(wilc, crc, 2)) {
- PRINT_ER("[wilc spi]: Failed data block crc read, bus error...\n");
+ dev_err(&spi->dev, "Failed data block crc read, bus error...\n");
result = N_FAIL;
break;
}
static int spi_data_write(struct wilc *wilc, u8 *b, u32 sz)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int ix, nbytes;
int result = 1;
u8 cmd, order, crc[2] = {0};
}
cmd |= order;
if (!wilc_spi_write(wilc, &cmd, 1)) {
- PRINT_ER("[wilc spi]: Failed data block cmd write, bus error...\n");
+ dev_err(&spi->dev,
+ "Failed data block cmd write, bus error...\n");
result = N_FAIL;
break;
}
* Write data
**/
if (!wilc_spi_write(wilc, &b[ix], nbytes)) {
- PRINT_ER("[wilc spi]: Failed data block write, bus error...\n");
+ dev_err(&spi->dev,
+ "Failed data block write, bus error...\n");
result = N_FAIL;
break;
}
**/
if (!g_spi.crc_off) {
if (!wilc_spi_write(wilc, crc, 2)) {
- PRINT_ER("[wilc spi]: Failed data block crc write, bus error...\n");
+ dev_err(&spi->dev,"Failed data block crc write, bus error...\n");
result = N_FAIL;
break;
}
static int spi_internal_write(struct wilc *wilc, u32 adr, u32 dat)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int result;
dat = cpu_to_le32(dat);
result = spi_cmd_complete(wilc, CMD_INTERNAL_WRITE, adr, (u8 *)&dat, 4,
0);
if (result != N_OK) {
- PRINT_ER("[wilc spi]: Failed internal write cmd...\n");
+ dev_err(&spi->dev, "Failed internal write cmd...\n");
}
return result;
static int spi_internal_read(struct wilc *wilc, u32 adr, u32 *data)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int result;
result = spi_cmd_complete(wilc, CMD_INTERNAL_READ, adr, (u8 *)data, 4,
0);
if (result != N_OK) {
- PRINT_ER("[wilc spi]: Failed internal read cmd...\n");
+ dev_err(&spi->dev, "Failed internal read cmd...\n");
return 0;
}
static int wilc_spi_write_reg(struct wilc *wilc, u32 addr, u32 data)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int result = N_OK;
u8 cmd = CMD_SINGLE_WRITE;
u8 clockless = 0;
result = spi_cmd_complete(wilc, cmd, addr, (u8 *)&data, 4, clockless);
if (result != N_OK) {
- PRINT_ER("[wilc spi]: Failed cmd, write reg (%08x)...\n", addr);
+ dev_err(&spi->dev, "Failed cmd, write reg (%08x)...\n", addr);
}
return result;
static int _wilc_spi_write(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int result;
u8 cmd = CMD_DMA_EXT_WRITE;
result = spi_cmd_complete(wilc, cmd, addr, NULL, size, 0);
if (result != N_OK) {
- PRINT_ER("[wilc spi]: Failed cmd, write block (%08x)...\n", addr);
+ dev_err(&spi->dev,
+ "Failed cmd, write block (%08x)...\n", addr);
return 0;
}
**/
result = spi_data_write(wilc, buf, size);
if (result != N_OK) {
- PRINT_ER("[wilc spi]: Failed block data write...\n");
+ dev_err(&spi->dev, "Failed block data write...\n");
}
return 1;
static int wilc_spi_read_reg(struct wilc *wilc, u32 addr, u32 *data)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int result = N_OK;
u8 cmd = CMD_SINGLE_READ;
u8 clockless = 0;
if (addr < 0x30) {
- /* PRINT_ER("***** read addr %d\n\n", addr); */
+ /* dev_err(&spi->dev, "***** read addr %d\n\n", addr); */
/* Clockless register*/
cmd = CMD_INTERNAL_READ;
clockless = 1;
result = spi_cmd_complete(wilc, cmd, addr, (u8 *)data, 4, clockless);
if (result != N_OK) {
- PRINT_ER("[wilc spi]: Failed cmd, read reg (%08x)...\n", addr);
+ dev_err(&spi->dev, "Failed cmd, read reg (%08x)...\n", addr);
return 0;
}
static int _wilc_spi_read(struct wilc *wilc, u32 addr, u8 *buf, u32 size)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
u8 cmd = CMD_DMA_EXT_READ;
int result;
result = spi_cmd_complete(wilc, cmd, addr, buf, size, 0);
if (result != N_OK) {
- PRINT_ER("[wilc spi]: Failed cmd, read block (%08x)...\n", addr);
+ dev_err(&spi->dev, "Failed cmd, read block (%08x)...\n", addr);
return 0;
}
static int wilc_spi_clear_int(struct wilc *wilc)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
u32 reg;
if (!wilc_spi_read_reg(wilc, WILC_HOST_RX_CTRL_0, ®)) {
- PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_HOST_RX_CTRL_0);
+ dev_err(&spi->dev, "Failed read reg (%08x)...\n",
+ WILC_HOST_RX_CTRL_0);
return 0;
}
reg &= ~0x1;
static int wilc_spi_sync(struct wilc *wilc)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
u32 reg;
int ret;
**/
ret = wilc_spi_read_reg(wilc, WILC_PIN_MUX_0, ®);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
+ dev_err(&spi->dev,"Failed read reg (%08x)...\n",
+ WILC_PIN_MUX_0);
return 0;
}
reg |= BIT(8);
ret = wilc_spi_write_reg(wilc, WILC_PIN_MUX_0, reg);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
+ dev_err(&spi->dev, "Failed write reg (%08x)...\n",
+ WILC_PIN_MUX_0);
return 0;
}
**/
ret = wilc_spi_read_reg(wilc, WILC_INTR_ENABLE, ®);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE);
+ dev_err(&spi->dev, "Failed read reg (%08x)...\n",
+ WILC_INTR_ENABLE);
return 0;
}
reg |= BIT(16);
ret = wilc_spi_write_reg(wilc, WILC_INTR_ENABLE, reg);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
+ dev_err(&spi->dev, "Failed write reg (%08x)...\n",
+ WILC_INTR_ENABLE);
return 0;
}
static int _wilc_spi_init(struct wilc *wilc, wilc_debug_func func)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
u32 reg;
u32 chipid;
if (isinit) {
if (!wilc_spi_read_reg(wilc, 0x1000, &chipid)) {
- PRINT_ER("[wilc spi]: Fail cmd read chip id...\n");
+ dev_err(&spi->dev, "Fail cmd read chip id...\n");
return 0;
}
return 1;
memset(&g_spi, 0, sizeof(wilc_spi_t));
- g_spi.dPrint = func;
if (!wilc_spi_init()) {
- PRINT_ER("[wilc spi]: Failed io init bus...\n");
+ dev_err(&spi->dev, "Failed io init bus...\n");
return 0;
} else {
return 0;
/* Read failed. Try with CRC off. This might happen when module
* is removed but chip isn't reset*/
g_spi.crc_off = 1;
- PRINT_ER("[wilc spi]: Failed internal read protocol with CRC on, retyring with CRC off...\n");
+ dev_err(&spi->dev, "Failed internal read protocol with CRC on, retyring with CRC off...\n");
if (!spi_internal_read(wilc, WILC_SPI_PROTOCOL_OFFSET, ®)) {
/* Reaad failed with both CRC on and off, something went bad */
- PRINT_ER("[wilc spi]: Failed internal read protocol...\n");
+ dev_err(&spi->dev,
+ "Failed internal read protocol...\n");
return 0;
}
}
reg &= ~0x70;
reg |= (0x5 << 4);
if (!spi_internal_write(wilc, WILC_SPI_PROTOCOL_OFFSET, reg)) {
- PRINT_ER("[wilc spi %d]: Failed internal write protocol reg...\n", __LINE__);
+ dev_err(&spi->dev, "[wilc spi %d]: Failed internal write protocol reg...\n", __LINE__);
return 0;
}
g_spi.crc_off = 1;
* make sure can read back chip id correctly
**/
if (!wilc_spi_read_reg(wilc, 0x1000, &chipid)) {
- PRINT_ER("[wilc spi]: Fail cmd read chip id...\n");
+ dev_err(&spi->dev, "Fail cmd read chip id...\n");
return 0;
}
- /* PRINT_ER("[wilc spi]: chipid (%08x)\n", chipid); */
+ /* dev_err(&spi->dev, "chipid (%08x)\n", chipid); */
g_spi.has_thrpt_enh = 1;
static int wilc_spi_read_size(struct wilc *wilc, u32 *size)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int ret;
if (g_spi.has_thrpt_enh) {
ret = wilc_spi_read_reg(wilc, WILC_VMM_TO_HOST_SIZE,
&byte_cnt);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed read WILC_VMM_TO_HOST_SIZE ...\n");
+ dev_err(&spi->dev,
+ "Failed read WILC_VMM_TO_HOST_SIZE ...\n");
goto _fail_;
}
tmp = (byte_cnt >> 2) & IRQ_DMA_WD_CNT_MASK;
static int wilc_spi_read_int(struct wilc *wilc, u32 *int_status)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int ret;
if (g_spi.has_thrpt_enh) {
ret = wilc_spi_read_reg(wilc, WILC_VMM_TO_HOST_SIZE,
&byte_cnt);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed read WILC_VMM_TO_HOST_SIZE ...\n");
+ dev_err(&spi->dev,
+ "Failed read WILC_VMM_TO_HOST_SIZE ...\n");
goto _fail_;
}
tmp = (byte_cnt >> 2) & IRQ_DMA_WD_CNT_MASK;
unkmown_mask = ~((1ul << g_spi.nint) - 1);
if ((tmp >> IRG_FLAGS_OFFSET) & unkmown_mask) {
- PRINT_ER("[wilc spi]: Unexpected interrupt (2): j=%d, tmp=%x, mask=%x\n", j, tmp, unkmown_mask);
+ dev_err(&spi->dev, "Unexpected interrupt (2): j=%d, tmp=%x, mask=%x\n", j, tmp, unkmown_mask);
happended = 1;
}
}
static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
int ret;
if (g_spi.has_thrpt_enh) {
flags >>= 1;
}
if (!ret) {
- PRINT_ER("[wilc spi]: Failed wilc_spi_write_reg, set reg %x ...\n", 0x10c8 + i * 4);
+ dev_err(&spi->dev,
+ "Failed wilc_spi_write_reg, set reg %x ...\n",
+ 0x10c8 + i * 4);
goto _fail_;
}
for (i = g_spi.nint; i < MAX_NUM_INT; i++) {
if (flags & 1)
- PRINT_ER("[wilc spi]: Unexpected interrupt cleared %d...\n", i);
+ dev_err(&spi->dev,
+ "Unexpected interrupt cleared %d...\n",
+ i);
flags >>= 1;
}
}
ret = wilc_spi_write_reg(wilc, WILC_VMM_TBL_CTL,
tbl_ctl);
if (!ret) {
- PRINT_ER("[wilc spi]: fail write reg vmm_tbl_ctl...\n");
+ dev_err(&spi->dev,
+ "fail write reg vmm_tbl_ctl...\n");
goto _fail_;
}
ret = wilc_spi_write_reg(wilc,
WILC_VMM_CORE_CTL, 1);
if (!ret) {
- PRINT_ER("[wilc spi]: fail write reg vmm_core_ctl...\n");
+ dev_err(&spi->dev,"fail write reg vmm_core_ctl...\n");
goto _fail_;
}
}
static int wilc_spi_sync_ext(struct wilc *wilc, int nint)
{
+ struct spi_device *spi = to_spi_device(wilc->dev);
u32 reg;
int ret, i;
if (nint > MAX_NUM_INT) {
- PRINT_ER("[wilc spi]: Too many interupts (%d)...\n", nint);
+ dev_err(&spi->dev, "Too many interupts (%d)...\n", nint);
return 0;
}
**/
ret = wilc_spi_read_reg(wilc, WILC_PIN_MUX_0, ®);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_PIN_MUX_0);
+ dev_err(&spi->dev, "Failed read reg (%08x)...\n",
+ WILC_PIN_MUX_0);
return 0;
}
reg |= BIT(8);
ret = wilc_spi_write_reg(wilc, WILC_PIN_MUX_0, reg);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_PIN_MUX_0);
+ dev_err(&spi->dev, "Failed write reg (%08x)...\n",
+ WILC_PIN_MUX_0);
return 0;
}
**/
ret = wilc_spi_read_reg(wilc, WILC_INTR_ENABLE, ®);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR_ENABLE);
+ dev_err(&spi->dev, "Failed read reg (%08x)...\n",
+ WILC_INTR_ENABLE);
return 0;
}
}
ret = wilc_spi_write_reg(wilc, WILC_INTR_ENABLE, reg);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR_ENABLE);
+ dev_err(&spi->dev, "Failed write reg (%08x)...\n",
+ WILC_INTR_ENABLE);
return 0;
}
if (nint) {
ret = wilc_spi_read_reg(wilc, WILC_INTR2_ENABLE, ®);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed read reg (%08x)...\n", WILC_INTR2_ENABLE);
+ dev_err(&spi->dev, "Failed read reg (%08x)...\n",
+ WILC_INTR2_ENABLE);
return 0;
}
ret = wilc_spi_read_reg(wilc, WILC_INTR2_ENABLE, ®);
if (!ret) {
- PRINT_ER("[wilc spi]: Failed write reg (%08x)...\n", WILC_INTR2_ENABLE);
+ dev_err(&spi->dev, "Failed write reg (%08x)...\n",
+ WILC_INTR2_ENABLE);
return 0;
}
}