char buf[64];
int i;
- drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s] enable: %s %s\n",
+ drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s] enable: %s [%s]\n",
crtc->base.base.id, crtc->base.name,
str_yes_no(pipe_config->hw.enable), context);
intel_crtc_state_dump(new_crtc_state, state,
intel_crtc_needs_modeset(new_crtc_state) ?
- "[modeset]" : "[fastset]");
+ "modeset" : "fastset");
}
return 0;
*/
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i)
- intel_crtc_state_dump(new_crtc_state, state, "[failed]");
+ intel_crtc_state_dump(new_crtc_state, state, "failed");
return ret;
}
to_intel_crtc_state(crtc->base.state);
intel_sanitize_crtc(crtc, ctx);
- intel_crtc_state_dump(crtc_state, NULL, "[setup_hw_state]");
+ intel_crtc_state_dump(crtc_state, NULL, "setup_hw_state");
}
intel_modeset_update_connector_atomic_state(dev);
if (!intel_pipe_config_compare(new_crtc_state,
pipe_config, false)) {
I915_STATE_WARN(1, "pipe state doesn't match!\n");
- intel_crtc_state_dump(pipe_config, NULL, "[hw state]");
- intel_crtc_state_dump(new_crtc_state, NULL, "[sw state]");
+ intel_crtc_state_dump(pipe_config, NULL, "hw state");
+ intel_crtc_state_dump(new_crtc_state, NULL, "sw state");
}
}