--- /dev/null
+('CPU_VGACNTRL', '0x00041000', '')
+('PORT_DBG', '0x00042308', '')
+('DIGITAL_PORT_HOTPLUG_CNTRL', '0x00044030', '')
+('FDI_PLL_BIOS_0', '0x00046000', '')
+('FDI_PLL_BIOS_1', '0x00046004', '')
+('FDI_PLL_BIOS_2', '0x00046008', '')
+('DISPLAY_PORT_PLL_BIOS_0', '0x0004600c', '')
+('DISPLAY_PORT_PLL_BIOS_1', '0x00046010', '')
+('DISPLAY_PORT_PLL_BIOS_2', '0x00046014', '')
+('FDI_PLL_FREQ_CTL', '0x00046030', '')
+('BLC_PWM_CPU_CTL2', '0x00048250', '')
+('BLC_PWM_CPU_CTL', '0x00048254', '')
+('HTOTAL_A', '0x00060000', '')
+('HBLANK_A', '0x00060004', '')
+('HSYNC_A', '0x00060008', '')
+('VTOTAL_A', '0x0006000c', '')
+('VBLANK_A', '0x00060010', '')
+('VSYNC_A', '0x00060014', '')
+('PIPEASRC', '0x0006001c', '')
+('VSYNCSHIFT_A', '0x00060028', '')
+('PIPEA_DATA_M1', '0x00060030', '')
+('PIPEA_DATA_N1', '0x00060034', '')
+('PIPEA_DATA_M2', '0x00060038', '')
+('PIPEA_DATA_N2', '0x0006003c', '')
+('PIPEA_LINK_M1', '0x00060040', '')
+('PIPEA_LINK_N1', '0x00060044', '')
+('PIPEA_LINK_M2', '0x00060048', '')
+('PIPEA_LINK_N2', '0x0006004c', '')
+('FDI_TXA_CTL', '0x00060100', '')
+('HTOTAL_B', '0x00061000', '')
+('HBLANK_B', '0x00061004', '')
+('HSYNC_B', '0x00061008', '')
+('VTOTAL_B', '0x0006100c', '')
+('VBLANK_B', '0x00061010', '')
+('VSYNC_B', '0x00061014', '')
+('PIPEBSRC', '0x0006101c', '')
+('VSYNCSHIFT_B', '0x00061028', '')
+('PIPEB_DATA_M1', '0x00061030', '')
+('PIPEB_DATA_N1', '0x00061034', '')
+('PIPEB_DATA_M2', '0x00061038', '')
+('PIPEB_DATA_N2', '0x0006103c', '')
+('PIPEB_LINK_M1', '0x00061040', '')
+('PIPEB_LINK_N1', '0x00061044', '')
+('PIPEB_LINK_M2', '0x00061048', '')
+('PIPEB_LINK_N2', '0x0006104c', '')
+('FDI_TXB_CTL', '0x00061100', '')
+('HTOTAL_C', '0x00062000', '')
+('HBLANK_C', '0x00062004', '')
+('HSYNC_C', '0x00062008', '')
+('VTOTAL_C', '0x0006200c', '')
+('VBLANK_C', '0x00062010', '')
+('VSYNC_C', '0x00062014', '')
+('PIPECSRC', '0x0006201c', '')
+('VSYNCSHIFT_C', '0x00062028', '')
+('PIPEC_DATA_M1', '0x00062030', '')
+('PIPEC_DATA_N1', '0x00062034', '')
+('PIPEC_DATA_M2', '0x00062038', '')
+('PIPEC_DATA_N2', '0x0006203c', '')
+('PIPEC_LINK_M1', '0x00062040', '')
+('PIPEC_LINK_N1', '0x00062044', '')
+('PIPEC_LINK_M2', '0x00062048', '')
+('PIPEC_LINK_N2', '0x0006204c', '')
+('FDI_TXC_CTL', '0x00062100', '')
+('CPU_eDP_A', '0x00064000', '')
+('PFA_WIN_POS', '0x00068070', '')
+('PFA_WIN_SIZE', '0x00068074', '')
+('PFA_CTL_1', '0x00068080', '')
+('PFA_CTL_2', '0x00068084', '')
+('PFA_CTL_3', '0x00068088', '')
+('PFA_CTL_4', '0x00068090', '')
+('PFB_WIN_POS', '0x00068870', '')
+('PFB_WIN_SIZE', '0x00068874', '')
+('PFB_CTL_1', '0x00068880', '')
+('PFB_CTL_2', '0x00068884', '')
+('PFB_CTL_3', '0x00068888', '')
+('PFB_CTL_4', '0x00068890', '')
+('PFC_WIN_POS', '0x00069070', '')
+('PFC_WIN_SIZE', '0x00069074', '')
+('PFC_CTL_1', '0x00069080', '')
+('PFC_CTL_2', '0x00069084', '')
+('PFC_CTL_3', '0x00069088', '')
+('PFC_CTL_4', '0x00069090', '')
+('PIPEACONF', '0x00070008', '')
+('DSPACNTR', '0x00070180', '')
+('DSPABASE', '0x00070184', '')
+('DSPASTRIDE', '0x00070188', '')
+('DSPASURF', '0x0007019c', '')
+('DSPATILEOFF', '0x000701a4', '')
+('PIPEBCONF', '0x00071008', '')
+('DSPBCNTR', '0x00071180', '')
+('DSPBBASE', '0x00071184', '')
+('DSPBSTRIDE', '0x00071188', '')
+('DSPBSURF', '0x0007119c', '')
+('DSPBTILEOFF', '0x000711a4', '')
+('PIPECCONF', '0x00072008', '')
+('DSPCCNTR', '0x00072180', '')
+('DSPCBASE', '0x00072184', '')
+('DSPCSTRIDE', '0x00072188', '')
+('DSPCSURF', '0x0007219c', '')
+('DSPCTILEOFF', '0x000721a4', '')
+('PCH_DPLL_A', '0x000c6014', '')
+('PCH_DPLL_B', '0x000c6018', '')
+('PCH_FPA0', '0x000c6040', '')
+('PCH_FPA1', '0x000c6044', '')
+('PCH_FPB0', '0x000c6048', '')
+('PCH_FPB1', '0x000c604c', '')
+('PCH_DREF_CONTROL', '0x000c6200', '')
+('PCH_RAWCLK_FREQ', '0x000c6204', '')
+('PCH_DPLL_TMR_CFG', '0x000c6208', '')
+('PCH_SSC4_PARMS', '0x000c6210', '')
+('PCH_SSC4_AUX_PARMS', '0x000c6214', '')
+('PCH_DPLL_ANALOG_CTL', '0x000c6300', '')
+('PCH_DPLL_SEL', '0x000c7000', '')
+('PCH_PP_STATUS', '0x000c7200', '')
+('PCH_PP_CONTROL', '0x000c7204', '')
+('PCH_PP_ON_DELAYS', '0x000c7208', '')
+('PCH_PP_OFF_DELAYS', '0x000c720c', '')
+('PCH_PP_DIVISOR', '0x000c7210', '')
+('BLC_PWM_PCH_CTL1', '0x000c8250', '')
+('BLC_PWM_PCH_CTL2', '0x000c8254', '')
+('TRANS_HTOTAL_A', '0x000e0000', '')
+('TRANS_HBLANK_A', '0x000e0004', '')
+('TRANS_HSYNC_A', '0x000e0008', '')
+('TRANS_VTOTAL_A', '0x000e000c', '')
+('TRANS_VBLANK_A', '0x000e0010', '')
+('TRANS_VSYNC_A', '0x000e0014', '')
+('TRANS_VSYNCSHIFT_A', '0x000e0028', '')
+('TRANSA_DATA_M1', '0x000e0030', '')
+('TRANSA_DATA_N1', '0x000e0034', '')
+('TRANSA_DATA_M2', '0x000e0038', '')
+('TRANSA_DATA_N2', '0x000e003c', '')
+('TRANSA_DP_LINK_M1', '0x000e0040', '')
+('TRANSA_DP_LINK_N1', '0x000e0044', '')
+('TRANSA_DP_LINK_M2', '0x000e0048', '')
+('TRANSA_DP_LINK_N2', '0x000e004c', '')
+('TRANS_DP_CTL_A', '0x000e0300', '')
+('TRANS_HTOTAL_B', '0x000e1000', '')
+('TRANS_HBLANK_B', '0x000e1004', '')
+('TRANS_HSYNC_B', '0x000e1008', '')
+('TRANS_VTOTAL_B', '0x000e100c', '')
+('TRANS_VBLANK_B', '0x000e1010', '')
+('TRANS_VSYNC_B', '0x000e1014', '')
+('TRANS_VSYNCSHIFT_B', '0x000e1028', '')
+('TRANSB_DATA_M1', '0x000e1030', '')
+('TRANSB_DATA_N1', '0x000e1034', '')
+('TRANSB_DATA_M2', '0x000e1038', '')
+('TRANSB_DATA_N2', '0x000e103c', '')
+('TRANSB_DP_LINK_M1', '0x000e1040', '')
+('TRANSB_DP_LINK_N1', '0x000e1044', '')
+('TRANSB_DP_LINK_M2', '0x000e1048', '')
+('TRANSB_DP_LINK_N2', '0x000e104c', '')
+('PCH_ADPA', '0x000e1100', '')
+('HDMIB', '0x000e1140', '')
+('HDMIC', '0x000e1150', '')
+('HDMID', '0x000e1160', '')
+('PCH_LVDS', '0x000e1180', '')
+('TRANS_DP_CTL_B', '0x000e1300', '')
+('TRANS_HTOTAL_C', '0x000e2000', '')
+('TRANS_HBLANK_C', '0x000e2004', '')
+('TRANS_HSYNC_C', '0x000e2008', '')
+('TRANS_VTOTAL_C', '0x000e200c', '')
+('TRANS_VBLANK_C', '0x000e2010', '')
+('TRANS_VSYNC_C', '0x000e2014', '')
+('TRANS_VSYNCSHIFT_C', '0x000e2028', '')
+('TRANSC_DATA_M1', '0x000e2030', '')
+('TRANSC_DATA_N1', '0x000e2034', '')
+('TRANSC_DATA_M2', '0x000e2038', '')
+('TRANSC_DATA_N2', '0x000e203c', '')
+('TRANSC_DP_LINK_M1', '0x000e2040', '')
+('TRANSC_DP_LINK_N1', '0x000e2044', '')
+('TRANSC_DP_LINK_M2', '0x000e2048', '')
+('TRANSC_DP_LINK_N2', '0x000e204c', '')
+('TRANS_DP_CTL_C', '0x000e2300', '')
+('PCH_DP_B', '0x000e4100', '')
+('PCH_DP_C', '0x000e4200', '')
+('PCH_DP_D', '0x000e4300', '')
+('TRANSACONF', '0x000f0008', '')
+('FDI_RXA_CTL', '0x000f000c', '')
+('FDI_RXA_MISC', '0x000f0010', '')
+('FDI_RXA_IIR', '0x000f0014', '')
+('FDI_RXA_IMR', '0x000f0018', '')
+('FDI_RXA_TUSIZE1', '0x000f0030', '')
+('FDI_RXA_TUSIZE2', '0x000f0038', '')
+('TRANSBCONF', '0x000f1008', '')
+('FDI_RXB_CTL', '0x000f100c', '')
+('FDI_RXB_MISC', '0x000f1010', '')
+('FDI_RXB_IIR', '0x000f1014', '')
+('FDI_RXB_IMR', '0x000f1018', '')
+('FDI_RXB_TUSIZE1', '0x000f1030', '')
+('FDI_RXB_TUSIZE2', '0x000f1038', '')
+('TRANSCCONF', '0x000f2008', '')
+('FDI_RXC_CTL', '0x000f200c', '')
+('FDI_RXC_MISC', '0x000f2010', '')
+('FDI_RXC_TUSIZE1', '0x000f2030', '')
+('FDI_RXC_TUSIZE2', '0x000f2038', '')
+('FDI_PLL_CTL_1', '0x000fe000', '')
+('FDI_PLL_CTL_2', '0x000fe004', '')