#define HAS_BLT_RING(devid) (IS_GEN6(devid) || \
IS_GEN7(devid))
+
+#define IS_BROADWATER(devid) (devid == PCI_CHIP_I946_GZ || \
+ devid == PCI_CHIP_I965_G_1 || \
+ devid == PCI_CHIP_I965_Q || \
+ devid == PCI_CHIP_I965_G)
+
+#define IS_CRESTLINE(devid) (devid == PCI_CHIP_I965_GM || \
+ devid == PCI_CHIP_I965_GME)
void intel_get_mmio(struct pci_device *pci_dev);
/* New style register access API */
-int intel_register_access_init(struct pci_device *pci_dev);
+int intel_register_access_init(struct pci_device *pci_dev, int safe);
void intel_register_access_fini(void);
uint32_t intel_register_read(uint32_t reg);
void intel_register_write(uint32_t reg, uint32_t val);
+#define INTEL_RANGE_RSVD (0<<0) /* Shouldn't be read or written */
+#define INTEL_RANGE_READ (1<<0)
+#define INTEL_RANGE_WRITE (1<<1)
+#define INTEL_RANGE_RW (INTEL_RANGE_READ | INTEL_RANGE_WRITE)
+#define INTEL_RANGE_END (1<<31)
+
+struct intel_register_range {
+ uint32_t base;
+ uint32_t size;
+ uint32_t flags;
+};
+
+struct intel_register_map {
+ struct intel_register_range *map;
+ uint32_t top;
+ uint32_t alignment_mask;
+};
+struct intel_register_map intel_get_register_map(uint32_t devid);
+struct intel_register_range *intel_get_register_range(struct intel_register_map map, uint32_t offset, int mode);
+
+
static inline uint32_t
INREG(uint32_t reg)
{
char debugfs_path[FILENAME_MAX];
char debugfs_forcewake_path[FILENAME_MAX];
uint32_t i915_devid;
+ struct intel_register_map map;
int key;
} mmio_data;
* @safe: use safe register access tables
*/
int
-intel_register_access_init(struct pci_device *pci_dev)
+intel_register_access_init(struct pci_device *pci_dev, int safe)
{
int ret;
if (mmio_data.inited)
return -1;
+ mmio_data.safe = safe != 0 ? true : false;
+
/* Find where the forcewake lock is */
ret = find_debugfs_path("/sys/kernel/debug/dri");
if (ret) {
}
mmio_data.i915_devid = pci_dev->device_id;
+ if (mmio_data.safe)
+ mmio_data.map = intel_get_register_map(mmio_data.i915_devid);
mmio_data.key = get_forcewake_lock();
mmio_data.inited++;
if (IS_GEN6(mmio_data.i915_devid))
assert(mmio_data.key != -1);
+
+ if (!mmio_data.safe)
+ goto read_out;
+
+ range = intel_get_register_range(mmio_data.map,
+ reg,
+ INTEL_RANGE_READ);
+
+ if(!range) {
+ fprintf(stderr, "Register read blocked for safety "
+ "(*0x%08x)\n", reg);
+ ret = 0xffffffff;
+ goto out;
+ }
+
+read_out:
+ ret = *(volatile uint32_t *)((volatile char *)mmio + reg);
+out:
+ return ret;
}
void
if (IS_GEN6(mmio_data.i915_devid))
assert(mmio_data.key != -1);
+ if (!mmio_data.safe)
+ goto write_out;
+
+ range = intel_get_register_range(mmio_data.map,
+ reg,
+ INTEL_RANGE_WRITE);
+
+ if (!range) {
+ fprintf(stderr, "Register write blocked for safety "
+ "(*0x%08x = 0x%x)\n", reg, val);
+ }
+
+write_out:
*(volatile uint32_t *)((volatile char *)mmio + reg) = val;
}