e1000e: convert .adjfreq to .adjfine
authorJacob Keller <jacob.e.keller@intel.com>
Thu, 21 Jul 2022 21:29:57 +0000 (14:29 -0700)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Thu, 28 Jul 2022 17:57:06 +0000 (10:57 -0700)
The PTP implementation for the e1000e driver uses the older .adjfreq
method. This method takes an adjustment in parts per billion. The newer
.adjfine implementation uses scaled_ppm. The use of scaled_ppm allows for
finer grained adjustments and is preferred over using the older
implementation.

Make use of mul_u64_u64_div_u64 in order to handle possible overflow of the
multiplication used to calculate the desired adjustment to the hardware
increment value.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Naama Meir <naamax.meir@linux.intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/e1000e/e1000.h
drivers/net/ethernet/intel/e1000e/netdev.c
drivers/net/ethernet/intel/e1000e/ptp.c

index 8d06c9d..e8a9a96 100644 (file)
@@ -329,7 +329,7 @@ struct e1000_adapter {
        struct ptp_clock *ptp_clock;
        struct ptp_clock_info ptp_clock_info;
        struct pm_qos_request pm_qos_req;
-       s32 ptp_delta;
+       long ptp_delta;
 
        u16 eee_advert;
 };
index 70d933f..321f2a9 100644 (file)
@@ -3922,9 +3922,9 @@ static void e1000e_systim_reset(struct e1000_adapter *adapter)
        if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
                return;
 
-       if (info->adjfreq) {
+       if (info->adjfine) {
                /* restore the previous ptp frequency delta */
-               ret_val = info->adjfreq(info, adapter->ptp_delta);
+               ret_val = info->adjfine(info, adapter->ptp_delta);
        } else {
                /* set the default base frequency if no adjustment possible */
                ret_val = e1000e_get_base_timinca(adapter, &timinca);
index 432e04c..0e488e4 100644 (file)
 #endif
 
 /**
- * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
+ * e1000e_phc_adjfine - adjust the frequency of the hardware clock
  * @ptp: ptp clock structure
- * @delta: Desired frequency change in parts per billion
+ * @delta: Desired frequency chance in scaled parts per million
  *
  * Adjust the frequency of the PHC cycle counter by the indicated delta from
  * the base frequency.
+ *
+ * Scaled parts per million is ppm but with a 16 bit binary fractional field.
  **/
-static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
+static int e1000e_phc_adjfine(struct ptp_clock_info *ptp, long delta)
 {
        struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
                                                     ptp_clock_info);
@@ -47,9 +49,8 @@ static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
 
        incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
 
-       adjustment = incvalue;
-       adjustment *= delta;
-       adjustment = div_u64(adjustment, 1000000000);
+       adjustment = mul_u64_u64_div_u64(incvalue, (u64)delta,
+                                        1000000ULL << 16);
 
        incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
 
@@ -257,7 +258,7 @@ static const struct ptp_clock_info e1000e_ptp_clock_info = {
        .n_per_out      = 0,
        .n_pins         = 0,
        .pps            = 0,
-       .adjfreq        = e1000e_phc_adjfreq,
+       .adjfine        = e1000e_phc_adjfine,
        .adjtime        = e1000e_phc_adjtime,
        .gettimex64     = e1000e_phc_gettimex,
        .settime64      = e1000e_phc_settime,