#define CONFIG_SYS_CLK_FREQ_C110 24000000
#endif
+unsigned long (*get_uclk)(void);
unsigned long (*get_pclk)(void);
unsigned long (*get_arm_clk)(void);
unsigned long (*get_pll_clk)(int);
get_pll_clk = s5pc110_get_pll_clk;
get_arm_clk = s5pc110_get_arm_clk;
get_pclk = s5pc110_get_pclk;
+ get_uclk = s5pc110_get_pclk; /* use PCLK */
} else {
get_pll_clk = s5pc100_get_pll_clk;
get_arm_clk = s5pc100_get_arm_clk;
get_pclk = s5pc100_get_pclk;
+ get_uclk = s5pc100_get_pclk; /* use PCLK */
}
}
extern unsigned long (*get_pll_clk)(int pllreg);
extern unsigned long (*get_arm_clk)(void);
extern unsigned long (*get_pclk)(void);
+extern unsigned long (*get_uclk)(void);
#endif
{
DECLARE_GLOBAL_DATA_PTR;
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
- u32 pclk = get_pclk();
+ u32 uclk = get_uclk();
u32 baudrate = gd->baudrate;
u32 val;
- val = pclk / baudrate;
+ val = uclk / baudrate;
writel(val / 16 - 1, &uart->ubrdiv);
writew(udivslot[val % 16], &uart->udivslot);