target-ppc: convert PPC 440 instructions to TCG

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5836 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index f52cfce87d61d689fb90f641168117e14b5fbf0a..5a9483e9b307052948c43dcfa4cd17f81c7ff093 100644 (file)
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -170,4 +170,6 @@ DEF_HELPER_1(load_74xx_tlbi, void, tl)
 DEF_HELPER_1(602_mfrom, tl, tl)
 #endif
 
+DEF_HELPER_3(dlmzb, tl, tl, tl, i32)
+
 #include "def-helper.h"

diff --git a/target-ppc/op.c b/target-ppc/op.c
index 6be8777768eeffae731ef4a171b408fb850d4ded..82750c6ef3025ad11876a45a30ce150bc3071cd3 100644 (file)
--- a/target-ppc/op.c
+++ b/target-ppc/op.c
@@ -706,23 +706,6 @@ void OPPROTO op_4xx_tlbwe_hi (void)
 
 /* SPR micro-ops */
 /* 440 specific */
-void OPPROTO op_440_dlmzb (void)
-{
-    do_440_dlmzb();
-    RETURN();
-}
-
-void OPPROTO op_440_dlmzb_update_Rc (void)
-{
-    if (T0 == 8)
-        T0 = 0x2;
-    else if (T0 < 4)
-        T0 = 0x4;
-    else
-        T0 = 0x8;
-    RETURN();
-}
-
 #if !defined(CONFIG_USER_ONLY)
 void OPPROTO op_store_pir (void)
 {

diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index a5bd9737f2581e292dc3f8a33b0fad056131bc26..f93adfa7eb92ce221bd134bd432b54e343063fab 100644 (file)
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -1999,24 +1999,39 @@ void do_store_403_pb (int num)
 #endif
 
 /* 440 specific */
-void do_440_dlmzb (void)
+target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_Rc)
 {
     target_ulong mask;
     int i;
 
     i = 1;
     for (mask = 0xFF000000; mask != 0; mask = mask >> 8) {
-        if ((T0 & mask) == 0)
+        if ((high & mask) == 0) {
+            if (update_Rc) {
+                env->crf[0] = 0x4;
+            }
             goto done;
+        }
         i++;
     }
     for (mask = 0xFF000000; mask != 0; mask = mask >> 8) {
-        if ((T1 & mask) == 0)
-            break;
+        if ((low & mask) == 0) {
+            if (update_Rc) {
+                env->crf[0] = 0x8;
+            }
+            goto done;
+        }
         i++;
     }
+    if (update_Rc) {
+        env->crf[0] = 0x2;
+    }
  done:
-    T0 = i;
+    env->xer = (env->xer & ~0x7F) | i;
+    if (update_Rc) {
+        env->crf[0] |= xer_so;
+    }
+    return i;
 }
 
 /*****************************************************************************/

diff --git a/target-ppc/op_helper.h b/target-ppc/op_helper.h
index 4318f9afa0bf80076bd7768e05fa4ae756b43543..7ee88340bf8b1f34e8d23cd6c7b9742edbe931fa 100644 (file)
--- a/target-ppc/op_helper.h
+++ b/target-ppc/op_helper.h
@@ -63,9 +63,6 @@ void do_4xx_tlbwe_lo (void);
 void do_4xx_tlbwe_hi (void);
 #endif
 
-/* PowerPC 440 specific helpers */
-void do_440_dlmzb (void);
-
 /* PowerPC 403 specific helpers */
 #if !defined(CONFIG_USER_ONLY)
 void do_load_403_pb (int num);

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index fe58d7acd1dc3708f4582835db38d922f567f3c7..0ab698711f277e63e450eb330d55a8ea14607cda 100644 (file)
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -5747,17 +5747,10 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE)
 /* dlmzb */
 GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC)
 {
-    tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rS(ctx->opcode)]);
-    tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]);
-    gen_op_440_dlmzb();
-    tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], cpu_T[0]);
-    tcg_gen_andi_tl(cpu_xer, cpu_xer, ~0x7F);
-    tcg_gen_or_tl(cpu_xer, cpu_xer, cpu_T[0]);
-    if (Rc(ctx->opcode)) {
-        gen_op_440_dlmzb_update_Rc();
-        tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_T[0]);
-        tcg_gen_andi_i32(cpu_crf[0], cpu_crf[0], 0xf);
-    }
+    TCGv_i32 t0 = tcg_const_i32(Rc(ctx->opcode));
+    gen_helper_dlmzb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)],
+                     cpu_gpr[rB(ctx->opcode)], t0);
+    tcg_temp_free_i32(t0);
 }
 
 /* mbar replaces eieio on 440 */