Remove LBC_CACHE_BASE from 8544 DS

The 8544 DS doesn't have any cacheable Local Bus memories set up.  By mapping
space for some anyway, we were allowing speculative loads into unmapped space,
which would cause an exception (annoying, even if ultimately harmless).
Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
problem.

Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/board/freescale/mpc8544ds/law.c b/board/freescale/mpc8544ds/law.c
index a82dede..54cf36b 100644 (file)
--- a/board/freescale/mpc8544ds/law.c
+++ b/board/freescale/mpc8544ds/law.c
@@ -30,7 +30,7 @@
 struct law_entry law_table[] = {
        SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
        SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI),
-       SET_LAW(CFG_LBC_CACHE_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC),
+       SET_LAW(CFG_LBC_NONCACHE_BASE, LAWAR_SIZE_128M, LAW_TRGT_IF_LBC),
        SET_LAW(CFG_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1),
        SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
        SET_LAW(CFG_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2),

diff --git a/board/freescale/mpc8544ds/tlb.c b/board/freescale/mpc8544ds/tlb.c
index 61fc609..40e0499 100644 (file)
--- a/board/freescale/mpc8544ds/tlb.c
+++ b/board/freescale/mpc8544ds/tlb.c
@@ -79,21 +79,13 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 4, BOOKE_PAGESZ_64M, 1),
 
-#ifdef CFG_LBC_CACHE_BASE
        /*
-        * TLB 5:       64M     Cacheable, non-guarded
-        */
-       SET_TLB_ENTRY(1, CFG_LBC_CACHE_BASE, CFG_LBC_CACHE_BASE,
-                     MAS3_SX|MAS3_SW|MAS3_SR, 0,
-                     0, 5, BOOKE_PAGESZ_64M, 1),
-#endif
-       /*
-        * TLB 6:       64M     Non-cacheable, guarded
+        * TLB 5:       64M     Non-cacheable, guarded
         * 0xf8000000   64M     PIXIS 0xF8000000 - 0xFBFFFFFF
         */
        SET_TLB_ENTRY(1, CFG_LBC_NONCACHE_BASE, CFG_LBC_NONCACHE_BASE,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-                     0, 6, BOOKE_PAGESZ_64M, 1),
+                     0, 5, BOOKE_PAGESZ_64M, 1),
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 669f4d7..2a12c05 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -148,8 +148,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CFG_BOOT_BLOCK         0xfc000000      /* boot TLB */
 
-#define CFG_LBC_CACHE_BASE     0xf0000000      /* Localbus cacheable */
-
 #define CFG_FLASH_BASE         0xff800000      /* start of FLASH 8M */
 
 #define CFG_BR0_PRELIM         0xff801001