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drm/nouveau/mc: bracket interrupt handler with NV_PMC_INTR_EN disable/re-enable
author
Ben Skeggs
<bskeggs@redhat.com>
Fri, 11 Oct 2013 04:42:47 +0000
(14:42 +1000)
committer
Ben Skeggs
<bskeggs@redhat.com>
Fri, 8 Nov 2013 05:39:05 +0000
(15:39 +1000)
This looks to be what NVIDIA do pretty much everywhere, since forever.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/core/subdev/mc/base.c
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diff --git
a/drivers/gpu/drm/nouveau/core/subdev/mc/base.c
b/drivers/gpu/drm/nouveau/core/subdev/mc/base.c
index
f26fcbd
..
b643722
100644
(file)
--- a/
drivers/gpu/drm/nouveau/core/subdev/mc/base.c
+++ b/
drivers/gpu/drm/nouveau/core/subdev/mc/base.c
@@
-33,6
+33,9
@@
nouveau_mc_intr(int irq, void *arg)
struct nouveau_subdev *unit;
u32 intr, stat;
+ nv_wr32(pmc, 0x000140, 0x00000000);
+ nv_rd32(pmc, 0x000140);
+
intr = nv_rd32(pmc, 0x000100);
if (intr == 0xffffffff) /* likely fallen off the bus */
intr = 0x00000000;
@@
-54,6
+57,7
@@
nouveau_mc_intr(int irq, void *arg)
nv_error(pmc, "unknown intr 0x%08x\n", stat);
}
+ nv_wr32(pmc, 0x000140, 0x00000001);
return intr ? IRQ_HANDLED : IRQ_NONE;
}