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[mips] Define `mov.d` instructions using `ABSS_M` multiclass. NFC
author
Simon Atanasyan
<simon@atanasyan.com>
Wed, 13 Mar 2019 14:22:58 +0000
(14:22 +0000)
committer
Simon Atanasyan
<simon@atanasyan.com>
Wed, 13 Mar 2019 14:22:58 +0000
(14:22 +0000)
llvm-svn: 356051
llvm/lib/Target/Mips/MipsInstrFPU.td
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diff --git
a/llvm/lib/Target/Mips/MipsInstrFPU.td
b/llvm/lib/Target/Mips/MipsInstrFPU.td
index f2648a7e8e48a0fd6993b0608268404a392962a3..0b03da9b5a685ce4cbf8630f1242fe8ff3efbc40 100644
(file)
--- a/
llvm/lib/Target/Mips/MipsInstrFPU.td
+++ b/
llvm/lib/Target/Mips/MipsInstrFPU.td
@@
-550,12
+550,7
@@
let AdditionalPredicates = [NotInMicroMips] in {
let isMoveReg = 1 in {
def FMOV_S : MMRel, ABSS_FT<"mov.s", FGR32Opnd, FGR32Opnd, II_MOV_S>,
ABSS_FM<0x6, 16>, ISA_MIPS1;
- def FMOV_D32 : MMRel, ABSS_FT<"mov.d", AFGR64Opnd, AFGR64Opnd, II_MOV_D>,
- ABSS_FM<0x6, 17>, ISA_MIPS1, FGR_32;
- def FMOV_D64 : ABSS_FT<"mov.d", FGR64Opnd, FGR64Opnd, II_MOV_D>,
- ABSS_FM<0x6, 17>, ISA_MIPS1, FGR_64 {
- let DecoderNamespace = "MipsFP64";
- }
+ defm FMOV : ABSS_M<"mov.d", II_MOV_D>, ABSS_FM<0x6, 17>, ISA_MIPS1;
} // isMoveReg
}