net: phy: bcm7xx: add jumbo frame configuration to PHY
authorMurali Krishna Policharla <murali.policharla@broadcom.com>
Fri, 27 Mar 2020 19:55:40 +0000 (21:55 +0200)
committerDavid S. Miller <davem@davemloft.net>
Fri, 27 Mar 2020 23:07:24 +0000 (16:07 -0700)
The BCM7XX PHY family requires special configuration to pass jumbo
frames. Do that during initial PHY setup.

Signed-off-by: Murali Krishna Policharla <murali.policharla@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/bcm-phy-lib.c
drivers/net/phy/bcm-phy-lib.h
drivers/net/phy/bcm7xxx.c
include/linux/brcmphy.h

index e0d3310957ffaed2f6249fb5e25c2afdb4bba4c6..e77b274a09fd540fe95aa209e0b1c2f1fd5e2679 100644 (file)
@@ -423,6 +423,28 @@ int bcm_phy_28nm_a0b0_afe_config_init(struct phy_device *phydev)
 }
 EXPORT_SYMBOL_GPL(bcm_phy_28nm_a0b0_afe_config_init);
 
+int bcm_phy_enable_jumbo(struct phy_device *phydev)
+{
+       int ret;
+
+       ret = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL);
+       if (ret < 0)
+               return ret;
+
+       /* Enable extended length packet reception */
+       ret = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL,
+                                  ret | MII_BCM54XX_AUXCTL_ACTL_EXT_PKT_LEN);
+       if (ret < 0)
+               return ret;
+
+       /* Enable the elastic FIFO for raising the transmission limit from
+        * 4.5KB to 10KB, at the expense of an additional 16 ns in propagation
+        * latency.
+        */
+       return phy_set_bits(phydev, MII_BCM54XX_ECR, MII_BCM54XX_ECR_FIFOE);
+}
+EXPORT_SYMBOL_GPL(bcm_phy_enable_jumbo);
+
 MODULE_DESCRIPTION("Broadcom PHY Library");
 MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Broadcom Corporation");
index c86fb9d1240c2657aeeb7727cebac8fe8173f593..129df819be8c71807d6d734febb53efbae80d752 100644 (file)
@@ -65,5 +65,6 @@ void bcm_phy_get_stats(struct phy_device *phydev, u64 *shadow,
                       struct ethtool_stats *stats, u64 *data);
 void bcm_phy_r_rc_cal_reset(struct phy_device *phydev);
 int bcm_phy_28nm_a0b0_afe_config_init(struct phy_device *phydev);
+int bcm_phy_enable_jumbo(struct phy_device *phydev);
 
 #endif /* _LINUX_BCM_PHY_LIB_H */
index af8eabe7a6d4438876877b634f6a51f47449f691..692048d86ab12e80585f45d358be7b3550bba371 100644 (file)
@@ -178,6 +178,10 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev)
                break;
        }
 
+       if (ret)
+               return ret;
+
+       ret =  bcm_phy_enable_jumbo(phydev);
        if (ret)
                return ret;
 
index b475e7f20d28a919a151763a9497da48a2d6f8a1..6462c54478726c3f70cbb5099471a61a7fa9fa50 100644 (file)
@@ -79,6 +79,7 @@
 #define MII_BCM54XX_ECR                0x10    /* BCM54xx extended control register */
 #define MII_BCM54XX_ECR_IM     0x1000  /* Interrupt mask */
 #define MII_BCM54XX_ECR_IF     0x0800  /* Interrupt force */
+#define MII_BCM54XX_ECR_FIFOE  0x0001  /* FIFO elasticity */
 
 #define MII_BCM54XX_ESR                0x11    /* BCM54xx extended status register */
 #define MII_BCM54XX_ESR_IS     0x1000  /* Interrupt status */
 #define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL      0x00
 #define MII_BCM54XX_AUXCTL_ACTL_TX_6DB         0x0400
 #define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA      0x0800
+#define MII_BCM54XX_AUXCTL_ACTL_EXT_PKT_LEN    0x4000
 
 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC                        0x07
 #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN   0x0010