powerpc: Move update_power8_hid0() into its only user
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Wed, 9 Jun 2021 06:10:29 +0000 (06:10 +0000)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 16 Jun 2021 14:09:11 +0000 (00:09 +1000)
update_power8_hid0() is used only by powernv platform subcore.c

Move it there.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/37f41d74faa0c66f90b373e243e8b1ee37a1f6fa.1623219019.git.christophe.leroy@csgroup.eu
arch/powerpc/include/asm/reg.h
arch/powerpc/platforms/powernv/subcore.c

index 59b98f5..be85cf1 100644 (file)
@@ -1446,16 +1446,6 @@ extern void scom970_write(unsigned int address, unsigned long value);
 struct pt_regs;
 
 extern void ppc_save_regs(struct pt_regs *regs);
-
-static inline void update_power8_hid0(unsigned long hid0)
-{
-       /*
-        *  The HID0 update on Power8 should at the very least be
-        *  preceded by a SYNC instruction followed by an ISYNC
-        *  instruction
-        */
-       asm volatile("sync; mtspr %0,%1; isync":: "i"(SPRN_HID0), "r"(hid0));
-}
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_REG_H */
index 73207b5..7e98b00 100644 (file)
@@ -169,6 +169,16 @@ static void update_hid_in_slw(u64 hid0)
        }
 }
 
+static inline void update_power8_hid0(unsigned long hid0)
+{
+       /*
+        *  The HID0 update on Power8 should at the very least be
+        *  preceded by a SYNC instruction followed by an ISYNC
+        *  instruction
+        */
+       asm volatile("sync; mtspr %0,%1; isync":: "i"(SPRN_HID0), "r"(hid0));
+}
+
 static void unsplit_core(void)
 {
        u64 hid0, mask;