}
static __attribute__ ((noreturn)) void
+illegal_instruction_or_combination (SIM_CPU *cpu)
+{
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+ else
+ illegal_instruction (cpu);
+}
+
+static __attribute__ ((noreturn)) void
unhandled_instruction (SIM_CPU *cpu, const char *insn)
{
SIM_DESC sd = CPU_STATE (cpu);
CYCLE_DELAY = 2;
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
static void
/* Can't push/pop reserved registers */
if (reg_is_reserved (grp, reg))
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
if (W == 0)
{
/* Dreg and Preg are not supported by this instruction. */
if (grp == 0 || grp == 1)
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
TRACE_INSN (cpu, "%s = [SP++];", reg_name);
/* Can't pop USP while in userspace. */
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE
TRACE_EXTRACT (cpu, "%s: d:%i p:%i W:%i dr:%i pr:%i",
__func__, d, p, W, dr, pr);
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
if ((d == 0 && p == 0) || (p && imm5 (pr) > 5)
|| (d && !p && pr) || (p && !d && dr))
illegal_instruction (cpu);
bs64 diff = acc0 - acc1;
if (x != 0 || y != 0)
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
if (opc == 5 && I == 0 && G == 0)
{
SET_CCREG (acc0 <= acc1);
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
SET_ASTATREG (az, diff == 0);
SET_ASTATREG (an, diff < 0);
TRACE_INSN (cpu, "CC = %c%i %s %c%i%s;", s, x, op, d, y, sign);
}
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
SET_CCREG (cc);
/* Pointer compares only touch CC. */
if (!G)
SET_CCREG (!CCREG);
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
static void
TRACE_INSN (cpu, "%s %s= %s;", D ? astat_names[cbit] : "CC",
op_names[op], D ? "CC" : astat_names[cbit]);
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
/* CC = CC; is invalid. */
if (cbit == 5)
illegal_instruction (cpu);
- if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
- illegal_instruction_combination (cpu);
-
pval = !!(ASTAT & (1 << cbit));
if (D == 0)
switch (op)
TRACE_INSN (cpu, "%s = %s;", dstreg_name, srcreg_name);
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
/* Reserved slots cannot be a src/dst. */
if (reg_is_reserved (gs, src) || reg_is_reserved (gd, dst))
goto invalid_move;
PROFILE_COUNT_INSN (cpu, pc, BFIN_INSN_ALU2op);
TRACE_EXTRACT (cpu, "%s: opc:%i src:%i dst:%i", __func__, opc, src, dst);
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
if (opc == 0)
{
TRACE_INSN (cpu, "R%i >>>= R%i;", dst, src);
PROFILE_COUNT_INSN (cpu, pc, BFIN_INSN_PTR2op);
TRACE_EXTRACT (cpu, "%s: opc:%i src:%i dst:%i", __func__, opc, src, dst);
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
if (opc == 0)
{
TRACE_INSN (cpu, "%s -= %s", dst_name, src_name);
TRACE_EXTRACT (cpu, "%s: opc:%i dst:%i src1:%i src0:%i",
__func__, opc, dst, src1, src0);
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
if (opc == 0)
{
TRACE_INSN (cpu, "R%i = R%i + R%i;", dst, src0, src1);
TRACE_EXTRACT (cpu, "%s: op:%i src:%i dst:%i", __func__, op, src, dst);
TRACE_DECODE (cpu, "%s: imm7:%#x", __func__, imm);
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
if (op == 0)
{
TRACE_INSN (cpu, "R%i = %s (X);", dst, imm7_str (imm));
TRACE_EXTRACT (cpu, "%s: op:%i src:%i dst:%i", __func__, op, src, dst);
TRACE_DECODE (cpu, "%s: imm:%#x", __func__, imm);
+ if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
+ illegal_instruction_combination (cpu);
+
if (op == 0)
{
TRACE_INSN (cpu, "%s = %s;", dst_name, imm7_str (imm));
TRACE_EXTRACT (cpu, "%s: W:%i aop:%i reg:%i idx:%i ptr:%i",
__func__, W, aop, reg, idx, ptr);
+ if (PARALLEL_GROUP == BFIN_PARALLEL_GROUP2)
+ illegal_instruction_combination (cpu);
+
if (aop == 1 && W == 0 && idx == ptr)
{
TRACE_INSN (cpu, "R%i.L = W[%s];", reg, ptr_name);
STORE (PREG (ptr), addr + PREG (idx));
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
static void
PROFILE_COUNT_INSN (cpu, pc, BFIN_INSN_dagMODim);
TRACE_EXTRACT (cpu, "%s: br:%i op:%i m:%i i:%i", __func__, br, op, m, i);
+ if (PARALLEL_GROUP == BFIN_PARALLEL_GROUP2)
+ illegal_instruction_combination (cpu);
+
if (op == 0 && br == 1)
{
TRACE_INSN (cpu, "I%i += M%i (BREV);", i, m);
dagsub (cpu, i, MREG (m));
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
static void
PROFILE_COUNT_INSN (cpu, pc, BFIN_INSN_dagMODik);
TRACE_EXTRACT (cpu, "%s: op:%i i:%i", __func__, op, i);
+ if (PARALLEL_GROUP == BFIN_PARALLEL_GROUP2)
+ illegal_instruction_combination (cpu);
+
if (op == 0)
{
TRACE_INSN (cpu, "I%i += 2;", i);
dagsub (cpu, i, 4);
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
static void
PUT_LONG (addr, DREG (reg));
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
static void
TRACE_EXTRACT (cpu, "%s: sz:%i W:%i aop:%i Z:%i ptr:%i reg:%i",
__func__, sz, W, aop, Z, ptr, reg);
- if (aop == 3)
- illegal_instruction (cpu);
+ if (aop == 3 || PARALLEL_GROUP == BFIN_PARALLEL_GROUP2)
+ illegal_instruction_or_combination (cpu);
if (W == 0)
{
SET_DREG (reg, (bs32) (bs8) GET_BYTE (PREG (ptr)));
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
else
{
PUT_BYTE (PREG (ptr), DREG (reg));
}
else
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
if (aop == 0)
W, offset, grp, reg);
TRACE_DECODE (cpu, "%s: negimm5s4:%#x", __func__, imm);
+ if (PARALLEL_GROUP == BFIN_PARALLEL_GROUP2)
+ illegal_instruction_or_combination (cpu);
+
if (W == 0)
{
TRACE_INSN (cpu, "%s = [FP + %s];", reg_name, imm_str);
TRACE_DECODE (cpu, "%s: uimm4s4/uimm4s2:%#x", __func__, imm);
+ if (PARALLEL_GROUP == BFIN_PARALLEL_GROUP2)
+ illegal_instruction_combination (cpu);
+
if (W == 1 && op == 2)
illegal_instruction (cpu);
else
{
TRACE_EXTRACT (cpu, "%s: no matching 16-bit pattern", __func__);
- illegal_instruction (cpu);
+ illegal_instruction_or_combination (cpu);
}
return insn_len;
}