tcg_out_qemu_st(s, args, 3);
break;
+ case INDEX_op_ext8s_i32:
+ tcg_out32 (s, EXTSB | RS (args[1]) | RA (args[0]));
+ break;
+ case INDEX_op_ext16s_i32:
+ tcg_out32 (s, EXTSH | RS (args[1]) | RA (args[0]));
+ break;
+
default:
tcg_dump_ops (s, stderr);
tcg_abort ();
{ INDEX_op_qemu_st64, { "M", "M", "M", "M" } },
#endif
+ { INDEX_op_ext8s_i32, { "r", "r" } },
+ { INDEX_op_ext16s_i32, { "r", "r" } },
+
{ -1 },
};
/* optional instructions */
#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_div_i32
+#define TCG_TARGET_HAS_ext8s_i32
+#define TCG_TARGET_HAS_ext16s_i32
#define TCG_AREG0 TCG_REG_R27
#define TCG_AREG1 TCG_REG_R24
static void tcg_out_op (TCGContext *s, int opc, const TCGArg *args,
const int *const_args)
{
+ int c;
+
switch (opc) {
case INDEX_op_exit_tb:
tcg_out_movi (s, TCG_TYPE_I64, TCG_REG_R3, args[0]);
tcg_out_qemu_st (s, args, 3);
break;
+ case INDEX_op_ext8s_i32:
+ case INDEX_op_ext8s_i64:
+ c = EXTSB;
+ goto gen_ext;
+ case INDEX_op_ext16s_i32:
+ case INDEX_op_ext16s_i64:
+ c = EXTSH;
+ goto gen_ext;
+ case INDEX_op_ext32s_i64:
+ c = EXTSW;
+ goto gen_ext;
+ gen_ext:
+ tcg_out32 (s, c | RS (args[1]) | RA (args[0]));
+ break;
+
default:
tcg_dump_ops (s, stderr);
tcg_abort ();
{ INDEX_op_qemu_st32, { "K", "K" } },
{ INDEX_op_qemu_st64, { "M", "M", "M" } },
+ { INDEX_op_ext8s_i32, { "r", "r" } },
+ { INDEX_op_ext16s_i32, { "r", "r" } },
+ { INDEX_op_ext8s_i64, { "r", "r" } },
+ { INDEX_op_ext16s_i64, { "r", "r" } },
+ { INDEX_op_ext32s_i64, { "r", "r" } },
+
{ -1 },
};
#define TCG_TARGET_HAS_div_i32
#define TCG_TARGET_HAS_neg_i64
#define TCG_TARGET_HAS_div_i64
+#define TCG_TARGET_HAS_ext8s_i32
+#define TCG_TARGET_HAS_ext16s_i32
+#define TCG_TARGET_HAS_ext8s_i64
+#define TCG_TARGET_HAS_ext16s_i64
+#define TCG_TARGET_HAS_ext32s_i64
#define TCG_AREG0 TCG_REG_R27
#define TCG_AREG1 TCG_REG_R24