sunxi: Remove options and setup code for I2C2-I2C4

These options are not currently enabled anywhere. Any new users should
use DM clocks and pinctrl.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h
index 2aa6bbb..cf5afda 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -141,8 +141,6 @@ enum sunxi_gpio_number {
 #define SUN4I_GPB_TWI0         2
 #define SUN4I_GPB_TWI1         2
 #define SUN5I_GPB_TWI1         2
-#define SUN4I_GPB_TWI2         2
-#define SUN5I_GPB_TWI2         2
 #define SUN8I_V3S_GPB_TWI0     2
 #define SUN4I_GPB_UART0                2
 #define SUN5I_GPB_UART0                2
@@ -164,8 +162,6 @@ enum sunxi_gpio_number {
 #define SUNXI_GPD_PWM          2
 
 #define SUNIV_GPE_UART0                5
-#define SUN8I_GPE_TWI2         3
-#define SUN50I_GPE_TWI2                3
 
 #define SUNXI_GPF_SDC0         2
 #define SUNXI_GPF_UART0                4
@@ -176,7 +172,6 @@ enum sunxi_gpio_number {
 #define SUN6I_GPG_SDC1         2
 #define SUN8I_GPG_SDC1         2
 #define SUN8I_GPG_UART1                2
-#define SUN6I_GPG_TWI3         2
 #define SUN5I_GPG_UART1                4
 
 #define SUN6I_GPH_PWM          2
@@ -188,15 +183,12 @@ enum sunxi_gpio_number {
 #define SUN6I_GPH_TWI1         2
 #define SUN8I_GPH_TWI1         2
 #define SUN50I_GPH_TWI1                2
-#define SUN6I_GPH_TWI2         2
 #define SUN6I_GPH_UART0                2
 #define SUN9I_GPH_UART0                2
 #define SUN50I_H6_GPH_UART0    2
 #define SUN50I_H616_GPH_UART0  2
 
 #define SUNXI_GPI_SDC3         2
-#define SUN7I_GPI_TWI3         3
-#define SUN7I_GPI_TWI4         3
 
 #define SUN6I_GPL0_R_P2WI_SCK  3
 #define SUN6I_GPL1_R_P2WI_SDA  3

diff --git a/arch/arm/include/asm/arch-sunxi/i2c.h b/arch/arm/include/asm/arch-sunxi/i2c.h
index 1cb2ba6..3525f22 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/i2c.h
+++ b/arch/arm/include/asm/arch-sunxi/i2c.h
@@ -13,17 +13,8 @@
 #ifdef CONFIG_I2C1_ENABLE
 #define CONFIG_I2C_MVTWSI_BASE1        SUNXI_TWI1_BASE
 #endif
-#ifdef CONFIG_I2C2_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE2        SUNXI_TWI2_BASE
-#endif
-#ifdef CONFIG_I2C3_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE3        SUNXI_TWI3_BASE
-#endif
-#ifdef CONFIG_I2C4_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE4        SUNXI_TWI4_BASE
-#endif
 #ifdef CONFIG_R_I2C_ENABLE
-#define CONFIG_I2C_MVTWSI_BASE5 SUNXI_R_TWI_BASE
+#define CONFIG_I2C_MVTWSI_BASE2 SUNXI_R_TWI_BASE
 #endif
 
 /* This is abp0-clk on sun4i/5i/7i / abp1-clk on sun6i/sun8i which is 24MHz */

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 73da6b8..e5ed1d9 100644 (file)
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -755,20 +755,6 @@ config I2C1_ENABLE
        ---help---
        See I2C0_ENABLE help text.
 
-config I2C2_ENABLE
-       bool "Enable I2C/TWI controller 2"
-       select CMD_I2C
-       ---help---
-       See I2C0_ENABLE help text.
-
-if MACH_SUN6I || MACH_SUN7I
-config I2C3_ENABLE
-       bool "Enable I2C/TWI controller 3"
-       select CMD_I2C
-       ---help---
-       See I2C0_ENABLE help text.
-endif
-
 if SUNXI_GEN_SUN6I || SUN50I_GEN_H6
 config R_I2C_ENABLE
        bool "Enable the PRCM I2C/TWI controller"
@@ -779,14 +765,6 @@ config R_I2C_ENABLE
        Set this to y to enable the I2C controller which is part of the PRCM.
 endif
 
-if MACH_SUN7I
-config I2C4_ENABLE
-       bool "Enable I2C/TWI controller 4"
-       select CMD_I2C
-       ---help---
-       See I2C0_ENABLE help text.
-endif
-
 config AXP_GPIO
        bool "Enable support for gpio-s on axp PMICs"
        depends on AXP_PMIC_BUS

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 28f702b..982ec44 100644 (file)
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -107,54 +107,6 @@ void i2c_init_board(void)
 #endif
 #endif
 
-#ifdef CONFIG_I2C2_ENABLE
-#if defined(CONFIG_MACH_SUN4I) || \
-    defined(CONFIG_MACH_SUN7I) || \
-    defined(CONFIG_MACH_SUN8I_R40)
-       sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2);
-       sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2);
-       clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN5I)
-       sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2);
-       sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2);
-       clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN6I)
-       sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2);
-       sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2);
-       clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN8I)
-       sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2);
-       sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2);
-       clock_twi_onoff(2, 1);
-#elif defined(CONFIG_MACH_SUN50I)
-       sunxi_gpio_set_cfgpin(SUNXI_GPE(14), SUN50I_GPE_TWI2);
-       sunxi_gpio_set_cfgpin(SUNXI_GPE(15), SUN50I_GPE_TWI2);
-       clock_twi_onoff(2, 1);
-#endif
-#endif
-
-#ifdef CONFIG_I2C3_ENABLE
-#if defined(CONFIG_MACH_SUN6I)
-       sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3);
-       sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3);
-       clock_twi_onoff(3, 1);
-#elif defined(CONFIG_MACH_SUN7I) || \
-      defined(CONFIG_MACH_SUN8I_R40)
-       sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
-       sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
-       clock_twi_onoff(3, 1);
-#endif
-#endif
-
-#ifdef CONFIG_I2C4_ENABLE
-#if defined(CONFIG_MACH_SUN7I) || \
-    defined(CONFIG_MACH_SUN8I_R40)
-       sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4);
-       sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4);
-       clock_twi_onoff(4, 1);
-#endif
-#endif
-
 #ifdef CONFIG_R_I2C_ENABLE
 #ifdef CONFIG_MACH_SUN50I
        clock_twi_onoff(5, 1);