usb: s3c-otg: Split out PHY control

Split the Samsung specific PHY control into a separate file
and compile this into the S3C OTG driver only if used on a
Samsung system.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Conflicts:
	drivers/usb/gadget/Makefile
	include/configs/exynos4-common.h
	include/configs/smdkv310.h

diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 83eee7e48b3a7b1675f40be8132d56f5c08e11e2..f1610d8f7d271ef743c3c3f3f895a70b4db8fcdc 100644 (file)
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -29,6 +29,7 @@ LIB   := $(obj)libusb_gadget.o
 ifdef CONFIG_USB_GADGET
 COBJS-y += epautoconf.o config.o usbstring.o
 COBJS-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
+COBJS-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o
 COBJS-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o
 COBJS-$(CONFIG_THOR_FUNCTION) += f_thor.o
 COBJS-$(CONFIG_DFU_FUNCTION) += f_dfu.o

diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c
index 93585dc20cc072bb22ebd2762b39fb91ba068700..c4d3ee851134ac8057abff9811556dec7320a4a6 100644 (file)
--- a/drivers/usb/gadget/s3c_udc_otg.c
+++ b/drivers/usb/gadget/s3c_udc_otg.c
@@ -165,68 +165,8 @@ bool dfu_usb_get_reset(void)
        return !!(readl(&reg->gintsts) & INT_RESET);
 }
 
-void otg_phy_init(struct s3c_udc *dev)
-{
-       unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
-       struct s3c_usbotg_phy *phy =
-               (struct s3c_usbotg_phy *)dev->pdata->regs_phy;
-
-       dev->pdata->phy_control(1);
-
-       /*USB PHY0 Enable */
-       printf("USB PHY0 Enable\n");
-
-       /* Enable PHY */
-       writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
-
-       if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
-               writel((readl(&phy->phypwr)
-                       &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN)
-                       &~FORCE_SUSPEND_0), &phy->phypwr);
-       else /* C110 GONI */
-               writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
-                       &~FORCE_SUSPEND_0), &phy->phypwr);
-
-       if (s5p_cpu_id == 0x4412)
-               writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 |
-                       EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ,
-                      &phy->phyclk); /* PLL 24Mhz */
-       else
-               writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) |
-                      CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
-
-       writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
-              | PHY_SW_RST0, &phy->rstcon);
-       udelay(10);
-       writel(readl(&phy->rstcon)
-              &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon);
-       udelay(10);
-}
-
-void otg_phy_off(struct s3c_udc *dev)
-{
-       unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
-       struct s3c_usbotg_phy *phy =
-               (struct s3c_usbotg_phy *)dev->pdata->regs_phy;
-
-       /* reset controller just in case */
-       writel(PHY_SW_RST0, &phy->rstcon);
-       udelay(20);
-       writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
-       udelay(20);
-
-       writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
-              | FORCE_SUSPEND_0, &phy->phypwr);
-
-       writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
-
-       writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
-             &phy->phyclk);
-
-       udelay(10000);
-
-       dev->pdata->phy_control(0);
-}
+__weak void otg_phy_init(struct s3c_udc *dev) {}
+__weak void otg_phy_off(struct s3c_udc *dev) {}
 
 /***********************************************************/
 

diff --git a/drivers/usb/gadget/s3c_udc_otg_phy.c b/drivers/usb/gadget/s3c_udc_otg_phy.c
new file mode 100644 (file)
index 0000000..f13cb89
--- /dev/null
+++ b/drivers/usb/gadget/s3c_udc_otg_phy.c
@@ -0,0 +1,101 @@
+/*
+ * drivers/usb/gadget/s3c_udc_otg.c
+ * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
+ *
+ * Copyright (C) 2008 for Samsung Electronics
+ *
+ * BSP Support for Samsung's UDC driver
+ * available at:
+ * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
+ *
+ * State machine bugfixes:
+ * Marek Szyprowski <m.szyprowski@samsung.com>
+ *
+ * Ported to u-boot:
+ * Marek Szyprowski <m.szyprowski@samsung.com>
+ * Lukasz Majewski <l.majewski@samsumg.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/errno.h>
+#include <linux/list.h>
+#include <malloc.h>
+
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+
+#include <asm/byteorder.h>
+#include <asm/unaligned.h>
+#include <asm/io.h>
+
+#include <asm/mach-types.h>
+
+#include "regs-otg.h"
+#include <usb/lin_gadget_compat.h>
+
+#include <usb/s3c_udc.h>
+
+void otg_phy_init(struct s3c_udc *dev)
+{
+       unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
+       struct s3c_usbotg_phy *phy =
+               (struct s3c_usbotg_phy *)dev->pdata->regs_phy;
+
+       dev->pdata->phy_control(1);
+
+       /* USB PHY0 Enable */
+       printf("USB PHY0 Enable\n");
+
+       /* Enable PHY */
+       writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl);
+
+       if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */
+               writel((readl(&phy->phypwr)
+                       &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN)
+                       &~FORCE_SUSPEND_0), &phy->phypwr);
+       else /* C110 GONI */
+               writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
+                       &~FORCE_SUSPEND_0), &phy->phypwr);
+
+       if (s5p_cpu_id == 0x4412)
+               writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 |
+                       EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ,
+                      &phy->phyclk); /* PLL 24Mhz */
+       else
+               writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) |
+                      CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
+
+       writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
+              | PHY_SW_RST0, &phy->rstcon);
+       udelay(10);
+       writel(readl(&phy->rstcon)
+              &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon);
+       udelay(10);
+}
+
+void otg_phy_off(struct s3c_udc *dev)
+{
+       unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
+       struct s3c_usbotg_phy *phy =
+               (struct s3c_usbotg_phy *)dev->pdata->regs_phy;
+
+       /* reset controller just in case */
+       writel(PHY_SW_RST0, &phy->rstcon);
+       udelay(20);
+       writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon);
+       udelay(20);
+
+       writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN
+              | FORCE_SUSPEND_0, &phy->phypwr);
+
+       writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl);
+
+       writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)),
+             &phy->phyclk);
+
+       udelay(10000);
+
+       dev->pdata->phy_control(0);
+}